公开(公告)号：US4749441A

公开(公告)日：1988-06-07

申请号：US940436

申请日：1986-12-11

申请人： John C. Christenson ,  Peter J. Schubert

发明人： John C. Christenson ,  Peter J. Schubert

IPC分类号： H01L21/20 ,  H01L21/762 ,  H01L29/786 ,  C30B29/60

CPC分类号： H01L21/02381 ,  H01L21/02532 ,  H01L21/02543 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/76264 ,  H01L29/78654 ,  H01L21/76278 ,  Y10S438/933

摘要： A method of fabricating single crystal silicon in a "mushroom" shape for use in fabricating devices such as a Silicon-On-Insulator-Like MOSFET. One embodiment of the inventive method entails fabricating a hole-within-a-hole structure in a thick silicon dioxide layer disposed on a single crystal silicon substrate, growing single crystal silicon in the inner hole, etching back the silicon dioxide layer to expose a portion of the silicon in the inner hole, and growing single crystal silicon by selective epitaxial growth in the outer hole.

摘要翻译： 制造“蘑菇”形状的单晶硅的方法，用于制造诸如绝缘体上硅的MOSFET的器件。 本发明方法的一个实施例需要在设置在单晶硅衬底上的厚二氧化硅层中制造孔内孔洞结构，在内孔中生长单晶硅，回蚀二氧化硅层以暴露部分 的内孔中的硅，并且通过外孔中的选择性外延生长生长单晶硅。

公开(公告)号：US4679309A

公开(公告)日：1987-07-14

申请号：US621733

申请日：1984-06-18

申请人： Joseph Borel

发明人： Joseph Borel

IPC分类号： H01L21/76 ,  H01L21/20 ,  H01L21/331 ,  H01L21/762 ,  H01L29/73

CPC分类号： H01L21/2022 ,  H01L21/76264 ,  H01L21/76278 ,  H01L21/76281 ,  Y10S148/011

摘要： A process for manufacturing isolated semi conductor components in a semi conductor wafer of the type used in bipolar technology. In this process, polycrystalline silicon is deposited in a recess in a silicon substrate whose walls are insulated by a silicon nitride layer except for an opening formed in this nitride layer at the bottom of said recess. Then, the polycrystalline silicon is re-epitaxied so as to become monocrystalline silicon by thermal heating from the "nucleus" formed by the underlying silicon in said opening.

摘要翻译： 在双极技术中使用的半导体晶片中制造隔离半导体元件的工艺。 在这个过程中，多晶硅沉积在硅衬底的凹槽中，硅衬底的壁除了在所述凹部底部的该氮化物层中形成的开口之外被氮化硅层绝缘。 然后，通过从由所述开口中的下面的硅形成的“核”进行热加热，将多晶硅重新表面化以便变成单晶硅。

公开(公告)号：US4261003A

公开(公告)日：1981-04-07

申请号：US19046

申请日：1979-03-09

申请人： Ingrid E. Magdo ,  Steven Magdo

发明人： Ingrid E. Magdo ,  Steven Magdo

IPC分类号： H01L21/3063 ,  H01L21/762 ,  H01L23/14 ,  H01L23/15 ,  H01L23/522 ,  H01L27/12 ,  H01L27/02 ,  H01L29/04

CPC分类号： H01L23/522 ,  H01L21/3063 ,  H01L21/76264 ,  H01L23/147 ,  H01L23/15 ,  H01L27/1203 ,  H01L21/76278 ,  H01L21/76283 ,  H01L2924/0002

摘要： Structure: An integrated circuit structure with full dielectric isolation comprising a supporting substrate having a planar surface of dielectric material and a semiconductor layer on said dielectric surface which forms a planar interface with the surface. Regions of oxidized silicon extend through the layer from said interface, surrounding and dielectrically isolating pockets of silicon in the layer; the oxidized silicon regions extend to the upper surface of the semiconductor layer where they are substantially co-planar with the silicon pockets. The devices of the integrated circuit are formed in said silicon pockets.Method: The structure is fabricated by a novel method wherein a lightly doped silicon layer is deposited on a highly doped silicon substrate; surrounding oxidized silicon regions are then formed by selectively thermally oxidizing portions of the silicon layer to form oxide regions which are co-extensive with the oxidized areas and, thus, are co-planar with the remaining silicon pockets at both surfaces of the layer; a member having a dielectric surface interfacing with the silicon layer is formed, and the silicon substrate is removed by preferential electrochemical anodic etching to leave the silicon layer having the oxidized regions surrounding spaced silicon pockets mounted on said member.

摘要翻译： 结构：具有全绝缘隔离的集成电路结构，包括具有介电材料的平坦表面的支撑衬底和在所述电介质表面上形成与表面的平面界面的半导体层。 氧化硅的区域从所述界面延伸穿过该层，围绕和介电地隔离该层中的硅袋; 氧化的硅区域延伸到半导体层的上表面，其中它们与硅袋基本共面。 集成电路的器件形成在所述硅袋中。 方法：通过新的方法制造该结构，其中轻掺杂硅层沉积在高掺杂硅衬底上; 然后通过选择性地热氧化硅层的部分来形成周围氧化的硅区域，以形成与氧化区域共同扩展的氧化物区域，因此与层的两个表面处的剩余的硅袋共面; 形成具有与硅层接合的电介质表面的部件，并且通过优先电化学阳极蚀刻去除硅衬底，以使硅层具有围绕安装在所述构件上的间隔开的硅袋的氧化区。