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公开(公告)号：US11570663B2
公开(公告)日：2023-01-31
申请号：US16875326
申请日：2020-05-15
摘要： A dynamic BSS color feature for co-hosted virtual access points is described. An example of a storage medium includes instructions to operations including enabling, by an access point, a dynamic basic service set (BSS) color feature for operation with multiple virtual access points (VAPs) hosted by the access point; switching a parameter of the access point to indicate that no co-hosted BSS is present; assigning a different BSS color to each of the VAPs; performing access point operations, including utilizing the assigned BSS colors for transmissions relating to any of the VAPs; and disabling the dynamic BSS color feature upon occurrence of one or more conditions.
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公开(公告)号：US11570199B2
公开(公告)日：2023-01-31
申请号：US17132531
申请日：2020-12-23
申请人： Intel Corporation
发明人： Shay Pluderman , Omer Ben-Shalom , Shlomo Avital , Tzipi Wales , Elisheva Zobin
摘要： A method of preventing exploitation of a vulnerability of a computing system includes generating a deprivation token to cause disabling of a selected one or more features of a component of the computing system to prevent an exploit of a vulnerability affecting the selected one or more features; and publishing the derivation token to at least one of a computing system manufacturer computing system and an enterprise information technology (IT) computing system for distribution to affected computing systems.
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公开(公告)号：US11561828B2
公开(公告)日：2023-01-24
申请号：US17317387
申请日：2021-05-11
申请人： Intel Corporation
发明人： Subramaniam Maiyuran , Varghese George , Altug Koker , Aravindh Anantaraman , SungYe Kim , Valentin Andrei , Joydeep Ray
IPC分类号： G06F9/48 , G06F9/38 , G06F12/0837 , G06F9/30 , G06F9/50
摘要： Accelerated synchronization operations using fine grain dependency check are disclosed. A graphics multiprocessor includes a plurality of execution units and synchronization circuitry that is configured to determine availability of at least one execution unit. The synchronization circuitry to perform a fine grain dependency check of availability of dependent data or operands in shared local memory or cache when at least one execution unit is available.
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84.发明授权公开(公告)号：US11558265B1
公开(公告)日：2023-01-17
申请号：US17557937
申请日：2021-12-21
申请人： Intel Corporation
IPC分类号： H04L41/5009 , H04L43/55 , G06F9/455
摘要： An apparatus to facilitate telemetry targeted query injection for enhanced debugging in microservices architectures is disclosed. The apparatus includes one or more processors to: identify contextual trace of a previous query recorded in collected data of a service, where microservices of the service responded to the previous query; access an interdependency flow graph representing an architecture and interaction of microservices deployed for a service; retrieve, based on the interdependency flow graph, telemetry data of the microservices corresponding to the contextual trace; identify, based on the telemetry data, an activation profile corresponding to the previous query, the activation profile detailing a response of the microservices to the previous query; compare the activation profile to a correlation profile for the previous query to detect whether an anomaly occurred in the service in response to the previous query; and recommend a modified query based on detection of the anomaly.
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公开(公告)号：US11557085B2
公开(公告)日：2023-01-17
申请号：US17112792
申请日：2020-12-04
申请人： Intel Corporation
发明人： Jill Boyce , Soethiha Soe , Selvakumar Panneer , Adam Lake , Nilesh Jain , Deepak Vembar , Glen J. Anderson , Varghese George , Carl Marshall , Scott Janus , Saurabh Tangri , Karthik Veeramani , Prasoonkumar Surti
摘要： Embodiments are directed to neural network processing for multi-object three-dimensional (3D) modeling. An embodiment of a computer-readable storage medium includes executable computer program instructions for obtaining data from multiple cameras, the data including multiple images, and generating a 3D model for 3D imaging based at least in part on the data from the cameras, wherein generating the 3D model includes one or more of performing processing with a first neural network to determine temporal direction based at least in part on motion of one or more objects identified in an image of the multiple images or performing processing with a second neural network to determine semantic content information for an image of the multiple images.
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公开(公告)号：US11550632B2
公开(公告)日：2023-01-10
申请号：US15775249
申请日：2015-12-24
申请人： INTEL CORPORATION
发明人： Yuanyuan Li , Yong Jiang , Linghyi Kong
摘要： A mechanism is described for facilitating efficient communication and data processing across clusters of computing machines in a heterogenous computing environment. A method includes detecting a request for processing of data using a programming framework and a programming model; facilitating interfacing between the programming framework and the programming model, wherein interfacing includes merging the programming model into the programming framework, wherein interfacing further includes integrating the programming framework with a distribution framework hosting the programming model; and calling on the distribution framework to schedule processing of a plurality of jobs based on the request.
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公开(公告)号：US11544823B2
公开(公告)日：2023-01-03
申请号：US16438750
申请日：2019-06-12
申请人： Intel Corporation
发明人： Attila Tamas Afra
摘要： Systems and methods for tone mapping of high dynamic range (HDR) images for high-quality deep learning based processing are disclosed. In one embodiment, a graphics processor includes a media pipeline to generate media requests for processing images and an execution unit to receive media requests from the media pipeline. The execution unit is configured to compute an auto-exposure scale for an image to effectively tone map the image, to scale the image with the computed auto-exposure scale, and to apply a tone mapping operator including a log function to the image and scaling the log function to generate a tone mapped image.
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公开(公告)号：US11539370B2
公开(公告)日：2022-12-27
申请号：US16798397
申请日：2020-02-23
申请人： TETRAMEM INC.
发明人： Ning Ge
摘要： Technologies relating to analog-to-analog quantizers with an intrinsic Rectified Linear Unit (ReLU) function designed for in-memory computing are disclosed. An apparatus, in some implementations, includes: a DAC; a first crossbar connected to the DAC; a first analog quantizer connected to the first crossbar; a buffer connected to the first analog quantizer; a second crossbar connected to the buffer; and an ADC connected to the second crossbar.
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公开(公告)号：US11537457B2
公开(公告)日：2022-12-27
申请号：US17304820
申请日：2021-06-25
申请人： Intel Corporation
发明人： Pradeep Pappachan , Sujoy Sen , Joseph Grecco , Mukesh Gangadhar Bhavani Venkatesan , Reshma Lal
IPC分类号： G06F9/54
摘要： A method of offloading performance of a workload includes receiving, on a first computing system acting as an initiator, a first function call from a caller, the first function call to be executed by an accelerator on a second computing system acting as a target, the first computing system coupled to the second computing system by a network; determining a type of the first function call; and generating a list of parameter values of the first function call.
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90.发明授权公开(公告)号：US11531728B2
公开(公告)日：2022-12-20
申请号：US16805764
申请日：2020-02-29
申请人： TETRAMEM INC.
发明人： Ning Ge
摘要： Technologies relating to implementing two-stage ramp ADCs in crossbar array circuits for high performance matrix multiplication are disclosed. An example two-stage ramp ADC includes: a transimpedance amplifier configured to convert an input signal from current to voltage; a comparator connected to the transimpedance amplifier; a switch bias set connected to the comparator; a switch side capacitor in parallel with the switch bias set; a ramp side capacitor in parallel with the switch bias set; a ramp generator connected to the comparator via the ramp side capacitor, wherein the ramp generator is configured to generate a ramp signal; a counter; and a memory connected to the comparator, wherein the memory is configured to store an output of the comparator.
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