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公开(公告)号:US11925082B2
公开(公告)日:2024-03-05
申请号:US17621861
申请日:2021-01-19
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Mei Li , Tian Dong , Li Wang , Guangliang Shang , Can Zheng
IPC: H10K59/131 , G09G3/3233 , G09G3/3266 , G09G3/3275 , H10K59/121 , H10K102/00
CPC classification number: H10K59/131 , G09G3/3233 , G09G3/3266 , G09G3/3275 , H10K59/121 , G09G2300/0426 , G09G2300/0819 , G09G2300/0842 , G09G2300/0861 , G09G2320/0214 , G09G2320/0247 , G09G2330/02 , G09G2330/021 , H10K2102/302
Abstract: A display panel and a display device are provided. The display panel includes: a pixel unit including a pixel circuit and a light-emitting element, the pixel circuit including a first transistor, the pixel unit including a first pixel unit and a second pixel unit located in a same row and adjacent columns; a first gate line and a second gate line, connected to gate electrodes of the first transistors of the first pixel unit and the second pixel unit; a first gate signal line, connected to the first pixel unit; a second gate signal line, connected to the second pixel unit; a first connection line connected with the first gate signal line through the first connection line; and a second connection line connected with the second gate signal line through the second connection line.
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82.
公开(公告)号:US11900883B2
公开(公告)日:2024-02-13
申请号:US17630634
申请日:2021-03-19
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Guangliang Shang , Can Zheng , Jiangnan Lu , Yuhan Qian , Li Wang , Libin Liu , Shiming Shi , Dawei Wang
IPC: G11C19/28 , G09G3/3266
CPC classification number: G09G3/3266 , G11C19/28 , G09G2310/0286
Abstract: A shift register unit, a method for driving a shift register unit, a gate driving circuit, and a display device are provided. The shift register unit includes: a second noise reduction control circuit. The second noise reduction control circuit includes: a first control circuit, configured to transmit a first voltage to a second noise reduction control node; a first coupling circuit, configured to store a level of the second noise reduction control node and adjust the level of the second noise reduction control node; a second coupling circuit, configured to reduce an adjustment magnitude of the first coupling circuit in case of adjusting the level of the second noise reduction control node; a transmission circuit, configured to connect the first noise reduction control node and the second noise reduction control node; and a storage circuit, configured to store the level of the first noise reduction control node.
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公开(公告)号:US11538395B2
公开(公告)日:2022-12-27
申请号:US17256233
申请日:2020-03-18
Applicant: BOE Technology Group Co., Ltd.
Inventor: Guangliang Shang , Jiangnan Lu , Can Zheng , Hao Zhang , Long Han , Libin Liu , Shiming Shi , Dawei Wang
Abstract: A shift register unit includes an input circuit, a first control circuit, a second control circuit and an output circuit. The input circuit is configured to provide signals of the signal input terminal to the first control node, and provide signals of the first power supply terminal or the first clock signal terminal to the second control node. The first control circuit is configured to provide signals of the second power supply terminal or the second clock signal terminal to the first output terminal. The second control circuit is configured to provide signals of the first power supply terminal to the second output terminal. The output circuit is configured to provide signals of the second power supply terminal to the second output terminal.
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84.
公开(公告)号:US11462149B2
公开(公告)日:2022-10-04
申请号:US17275068
申请日:2020-04-24
Applicant: BOE Technology Group Co., Ltd.
Inventor: Guangliang Shang , Jiangnan Lu , Jie Zhang , Yu Feng , Libin Liu
Abstract: Embodiments of the present disclosure provide a shift register unit and a method foe driving the same, a gate driving circuit, and a display device. The shift register unit includes: a control circuit coupled to an input signal terminal, a clock signal terminal, and an output control terminal, and configured to provide an output control signal to the output control terminal based on a signal from the input signal terminal and a signal from the clock signal terminal; and an output circuit coupled to the output control terminal, an output signal terminal, and a threshold voltage control terminal, and configured to provide an output signal to the output signal terminal under control of a potential at the output control terminal, and adjust a threshold voltage of at least one of a plurality of transistors in the output circuit under control of a signal from the threshold voltage control terminal.
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公开(公告)号:US11380374B2
公开(公告)日:2022-07-05
申请号:US16767755
申请日:2019-07-02
Applicant: BOE Technology Group Co., Ltd.
Inventor: Guangliang Shang , Xinshe Yin , Qian Yang , Libin Liu , Shiming Shi , Dawei Wang
Abstract: Embodiments of the present disclosure disclose a shift register unit, a driving method thereof, and a device. The shift register unit includes an input circuit, a node control circuit, a first control output circuit, a second control output circuit and an output circuit. By providing the first control output circuit and the second control output circuit, the first control output circuit and the second control output circuit may operate alternately, so that the first control output circuit and the second control output circuit may have time for characteristics recovery respectively, thus improving the service life and output stability of the shift register unit.
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86.
公开(公告)号:US11263951B2
公开(公告)日:2022-03-01
申请号:US16336546
申请日:2018-08-14
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Zhichong Wang , Haoliang Zheng , Seungwoo Han , Guangliang Shang , Lijun Yuan , Xing Yao , Mingfu Han
Abstract: Disclosed is a shift register unit, including a first input circuit, an input control circuit, a pull-down control circuit, a pull-down circuit, an output circuit and a second input circuit. The first input circuit includes a first input sub-circuit, and is configured to, under control of the first signal input terminal, cause a voltage of the first voltage terminal to be output to a second terminal of the first input sub-circuit and output to the pull-up node via a first terminal thereof. The input control circuit is configured to pull down a potential of the second terminal to the potential of a first power supply voltage terminal under control of an enable signal terminal.
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87.
公开(公告)号:US11250750B2
公开(公告)日:2022-02-15
申请号:US16126032
申请日:2018-09-10
Applicant: BOE Technology Group Co., Ltd.
Inventor: Zhichong Wang , Haoliang Zheng , Seungwoo Han , Guangliang Shang , Mingfu Han , Lijun Yuan , Xing Yao
Abstract: A shift register circuit, a driving method thereof, a gate drive circuit and a display device are provided. The shift register circuit includes an input sub-circuit, an output sub-circuit, a discharge sub-circuit and a noise reduction sub-circuit. The input sub-circuit is connected to an input signal terminal, a first power source terminal and a pull-down node, and configured to, under the control of an input signal, output a first power source terminal signal to the pull-down node. In the shift register circuit, the discharge sub-circuit may control the potential of the pull-down node to be an ineffective potential at the input stage, thereby preventing the noise reduction sub-circuit from affecting the potentials of the pull-up node and the output terminal under the control of the pull-down node, and ensuring normal output of the shift register circuit.
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公开(公告)号:US11238824B2
公开(公告)日:2022-02-01
申请号:US16332902
申请日:2018-09-26
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Lijun Yuan , Seungwoo Han , Guangliang Shang
IPC: G09G3/36
Abstract: The present disclosure relates to a pixel circuit. The pixel circuit may include a switch sub-circuit (10), a storage sub-circuit (20), and a driving sub-circuit (30). The storage sub-circuit (20) may include a first storage transistor (Tf1) and a second storage transistor (Tf2). Both the first storage transistor (Tf1) and the second storage transistor (Tf2) may be floating gate transistors. The storage sub-circuit (20) and the driving sub-circuit (30) may be configured to transmit a data signal from one of a plurality of data lines to a pixel electrode under control of the switch sub-circuit (10).
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公开(公告)号:US11232734B2
公开(公告)日:2022-01-25
申请号:US16964465
申请日:2019-09-25
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Guangliang Shang , Can Zheng , Jiangnan Lu , Tian Dong , Libin Liu , Long Han , Shiming Shi , Dawei Wang
Abstract: A shift register unit, a driving method, a gate driving circuit and a display device are provided. The shift register unit includes a first gate driving output circuit and a second gate driving output circuit. The first gate driving output circuit is used to output a first gate driving signal through the first gate driving signal output terminal; the second gate driving output circuit is used to generate a second gate driving signal outputted simultaneously with the first gate driving signal based on the first gate driving signal, a first clock signal and a second clock signal. In the present disclosure, the second gate driving output circuit is added, the first gate driving signal, the first clock signal, and the second clock signal are used to generate an inverted second gate driving signal, so that positive and negative switching control signals are generated by one stage of shift register unit.
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90.
公开(公告)号:US11176909B2
公开(公告)日:2021-11-16
申请号:US16633026
申请日:2019-05-28
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor: Xing Yao , Mingfu Han , Guangliang Shang , Hao Zhu , Yifang Chu , Yunsik Im
Abstract: The present disclosure provides a compensation method, compensation device, and a display device. The compensation method includes: adjusting charging time for multiple areas of the display screen so that the charging time for each area is positively related to a distance from the area to a data voltage input terminal; comparing a first grayscale value before compensation of a sub-pixel in an i-th row and j-th column with a second grayscale value input to a sub-pixel in an (i−1)-th row and j-th column; searching a corresponding grayscale compensation parameter from a grayscale compensation parameter table according to the first grayscale value and the second grayscale value; compensating the first grayscale value by the grayscale compensation parameter to obtain a third grayscale value; and inputting the third grayscale value to the sub-pixel in the i-th row and j-th column for display.
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