公开(公告)号：US20100082893A1

公开(公告)日：2010-04-01

申请号：US12631761

申请日：2009-12-04

申请人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F12/00 ,  G06F12/02 ,  G06F12/10

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F21/79 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

摘要翻译： 电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

公开(公告)号：US20100082892A1

公开(公告)日：2010-04-01

申请号：US12631748

申请日：2009-12-04

申请人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F12/00 ,  G06F12/02

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F21/79 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input— output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

摘要翻译： 电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

公开(公告)号：US20100030961A9

公开(公告)日：2010-02-04

申请号：US11466759

申请日：2006-08-23

申请人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Abraham C. Ma ,  Charles C. Lee ,  I-Kang Yu ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F12/00

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F21/79 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

摘要翻译： 电子数据闪存卡可由主机访问，并且包括连接到存储数据文件的闪存设备的处理单元，以及被激活以便与主计算机建立通信的输入 - 输出接口电路。 在一个实施例中，电子数据闪存卡使用USB输入/输出接口电路与主计算机进行通信。 闪速存储器控制器包括用于将由主计算机发送的逻辑地址转换成与闪存器件的扇区相关联的物理地址的索引。 该索引由参考来自各种查找表中的值和存储在闪存设备中的有效数据的仲裁逻辑控制。 闪存控制器还包括先进先出单元（FIFO），用于在后台进程中回收闪速存储器件的过时扇区，使得它们可用于重新编程。

公开(公告)号：US07576990B2

公开(公告)日：2009-08-18

申请号：US11683292

申请日：2007-03-07

申请人： Jim Chin-Nan Ni ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： Jim Chin-Nan Ni ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H05K1/14

CPC分类号： H05K5/0269 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087 ,  H05K5/026

摘要： A case-grounded flash-memory drive has a printed-circuit board assembly (PCBA) with flash-memory chips and a controller chip. The PCBA is encased inside an upper case and a lower case, with a Serial AT-Attachment (SATA) connector that fits through and opening between the cases. The cases can be assembled with the PCBA by a snap-together, ultrasonic-press, screw-fastener, or thermal-bond adhesive method. Dual-axis case-grounding pins draw any electro-static-discharges (ESD) current off the upper case along a primary axis and onto a PCBA ground through a secondary axis washer that is screwed into the PCBA. The primary axis body of the dual-axis case-grounding pins fits around a PCBA notch while the secondary axis passes through a metalized alignment hole for grounding. When the SATA connector is inserted into a host, the host ground sinks ESD currents collected by the dual-axis case-grounding pins.

摘要翻译： 外壳接地闪存驱动器具有带闪存芯片的印刷电路板组件（PCBA）和控制器芯片。 PCBA被封装在上壳体和下壳体内，并具有穿过并在壳体之间打开的串行AT附件（SATA）连接器。 这些情况可以通过卡扣，超声波压力机，螺纹紧固件或热粘合粘合剂方法与PCBA组装。 双轴外壳接地引脚通过螺纹连接到PCBA中的次轴垫圈将初始轴上的任何静电放电（ESD）电流从主轴上吸入PCBA接地。 双轴壳体 - 接地销的主轴体装配在PCBA槽口周围，而副轴线穿过金属化的对准孔进行接地。 当SATA连接器插入主机时，主机接地将吸收由双轴外壳接地引脚收集的ESD电流。

公开(公告)号：US07517252B2

公开(公告)日：2009-04-14

申请号：US11966827

申请日：2007-12-28

申请人： Jim Chin-Nan Ni ,  Siew Sin Hiew ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

发明人： Jim Chin-Nan Ni ,  Siew Sin Hiew ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

IPC分类号： H01R24/00

CPC分类号： H05K5/0256

摘要： Thin solid state drive (SSD) housing structures are described. According to one embodiment of the invention, a structure for housing an SSD includes a pair of brackets configured to support a PCBA of the SSD at either side of the PCBA via one or more ledges with corresponding fastener holes pre-configured thereon. The ledges are attached to inside surface of the brackets. Each of the brackets has a slab shape with a length and a height. The length is parallel to horizontal direction, while the height parallel to vertical. The ledges are located at mid-height and orientated substantially perpendicular to the brackets such that the PCBA is supported horizontally. In order to securely connect the PCBA with the brackets, a plurality of metal fasteners is used. The fasteners are placed through the fastener holes on the ledges and through corresponding alignment holes pre-configured on the PCBA.

摘要翻译： 描述了薄的固态驱动器（SSD）外壳结构。 根据本发明的一个实施例，用于容纳SSD的结构包括一对支架，其被配置为经由一个或多个突出部支撑在PCBA的任一侧的SSD的PCBA，其中预定配置有相应的紧固件孔。 凸缘连接到支架的内表面。 每个托架具有长度和高度的板形。 长度平行于水平方向，高度平行于垂直方向。 凸缘位于中间高度并且基本上垂直于支架定向，使得PCBA水平地支撑。 为了将PCBA与支架牢固连接，使用多个金属紧固件。 紧固件通过凸缘上的紧固件孔并通过预先配置在PCBA上的相应对准孔放置。

公开(公告)号：US07507119B2

公开(公告)日：2009-03-24

申请号：US11309847

申请日：2006-10-12

申请人： Jim Chin-Nan Ni ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： Jim Chin-Nan Ni ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： H01R13/648

CPC分类号： H01R13/6658 ,  H01R13/7175 ,  H05K5/0278

摘要： A Universal-Serial-Bus (USB) device has a USB plug with reduced wobble. A USB metal wrap around the perimeter of the USB plug is attached to a housing by overmolding. A plug supporter is inserted into the front of the USB metal wrap, and has locking tabs that snap over the inside wall of the housing. Side tabs on the plug supporter fit into side slots on the USB metal wrap to secure the plug supporter inside the USB metal wrap. A circuit board with a USB flash controller has USB metal contacts on an extension end that is inserted through the housing and into the USB metal wrap. The extension end fits underneath top tabs on the plug supporter, preventing the extension end with the USB metal contacts from upward wobble when the USB plug is inserted into a USB socket.

摘要翻译： 通用串行总线（USB）设备具有减少摆动的USB插头。 围绕USB插头的周边的USB金属包裹通过包覆成型附接到外壳。 插头支撑件插入USB金属包装的前部，并具有卡在外壳内壁上的锁定片。 插头支架上的侧面接头装配在USB金属外壳上的侧插槽中，以将插头支撑件固定在USB金属包装内。 带有USB闪存控制器的电路板在扩展端有USB金属触点，插入通过外壳和USB金属外壳。 延长端配合在插头支架上的顶部卡舌下方，当USB插头插入USB插座时，防止USB金属触点的延伸端向上摆动。

公开(公告)号：US20080318449A1

公开(公告)日：2008-12-25

申请号：US12113023

申请日：2008-04-30

申请人： Abraham Ma ,  I-Kang Yu ,  David Nguyen ,  Charles C. Lee ,  Ming-Shiang Shen

发明人： Abraham Ma ,  I-Kang Yu ,  David Nguyen ,  Charles C. Lee ,  Ming-Shiang Shen

IPC分类号： H01R24/00 ,  H01R12/00 ,  G06K9/00

CPC分类号： H01R29/00

摘要： A multi-level cell (MLC) dual-personality extended External Serial Advanced Technology Attachment (eSATA) flash drive includes a MLC dual-personality extended eSATA plug connector connected to a flash drive and removably connectable to a host. The connector is adaptable to receive electoral data from both a USB and eSATA interface.

摘要翻译： 多级单元（MLC）双人格扩展外部串行高级技术附件（eSATA）闪存驱动器包括连接到闪存驱动器并可拆卸地连接到主机的MLC双人格扩展eSATA插头连接器。 该连接器适用于从USB和eSATA接口接收选举数据。

公开(公告)号：US20080313388A1

公开(公告)日：2008-12-18

申请号：US11929776

申请日：2007-10-30

申请人： David Q. Chow ,  Frank I. Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

发明人： David Q. Chow ,  Frank I. Yu ,  Charles C. Lee ,  Abraham C. Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06F2212/7202 ,  G06F2212/7208 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087

摘要： An electronic data flash card is accessible by a host computer, and includes a processing unit connected to a flash memory device that stores a data file, and an input-output interface circuit activated so as to establish a communication with the host computer. In an embodiment, the electronic data flash card uses a USB input/output interface circuit for communication with the host computer. A flash memory controller includes an index for converting logical addresses sent by the host computer into physical addresses associated with sectors of the flash memory device. The index is controlled by arbitration logic referencing to values from various look up tables and valid data stored in the flash memory device. The flash memory controller further includes a first-in-first-out unit (FIFO) for recycling obsolete sectors of the flash memory device in the background process so that they are available for reprogramming.

公开(公告)号：US20080256287A1

公开(公告)日：2008-10-16

申请号：US12025706

申请日：2008-02-04

申请人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

发明人： Charles C. Lee ,  I-Kang Yu ,  David Nguyen ,  Abraham Chih-Kang Ma ,  Ming-Shiang Shen

IPC分类号： G06F12/02

CPC分类号： G06F12/0246 ,  G06F12/0607 ,  G11C11/5621 ,  G11C16/0408 ,  G11C16/349 ,  G11C16/3495

摘要： Methods and systems of managing memory addresses in a large capacity multi-level cell based flash memory device are described. According to one aspect, a flash memory device comprises a processing unit to manage logical-to-physical address correlation using an indexing scheme. The flash memory is partitioned into N sets. Each set includes a plurality of entries (i.e., blocks). N sets of partial logical entry number to physical block number and associated page usage information (hereinafter ‘PLTPPUI’) are stored in the reserved area of the MLC based flash memory. Only one the N sets is loaded to address correlation and page usage memory (ACPUM), which is a limited size random access memory (RAM). In one embodiment, static RAM (SRAM) is implemented for fast access time for the address correlation. LSA received together with the data transfer request dictates which one of the N sets of PLTPPUI is loaded into ACPUM.

摘要翻译： 描述了在大容量多级基于单元的闪存设备中管理存储器地址的方法和系统。 根据一个方面，一种闪存设备包括一个使用索引方案来管理逻辑到物理地址相关的处理单元。 闪存被分为N组。 每个集合包括多个条目（即，块）。 对于物理块号和相关联的页面使用信息（以下称为“PLTPPUI”）的N组部分逻辑条目号被存储在基于MLC的闪速存储器的保留区域中。 只有一个N集被加载以寻址相关和页面使用存储器（ACPUM），这是一个有限大小的随机存取存储器（RAM）。 在一个实施例中，静态RAM（SRAM）被实现用于地址相关的快速访问时间。 与数据传输请求一起接收的LSA指示将N组PLTPPUI中的哪一个加载到ACPUM中。

公开(公告)号：US07428605B2

公开(公告)日：2008-09-23

申请号：US11309842

申请日：2006-10-11

申请人： Jim Chin-Nan Ni ,  Abraham C. Ma ,  Edward W. Lee ,  Ming-Shiang Shen

发明人： Jim Chin-Nan Ni ,  Abraham C. Ma ,  Edward W. Lee ,  Ming-Shiang Shen

IPC分类号： G06F13/12 ,  H01R29/00

CPC分类号： H01R13/6658 ,  G06F12/1416 ,  G06F21/32 ,  G06F21/78 ,  G06K9/00087 ,  G06K19/07 ,  G06K19/07354 ,  G07C9/00087 ,  H01R13/7175 ,  H05K5/0278

摘要： A Universal-Serial-Bus (USB) device has a USB plug that is centered over a center-line of a circuit board. The circuit board with flash memory and a USB flash controller has metal pads that a USB connector is soldered to. The USB connector has a rear step that is about half the height of the USB connector plug. Contacts on the rear step are soldered to the metal pads on the circuit board so that the USB connector is centered around the edge of the circuit board. The overall height of the flash device can be reduced since the bulky USB connector is not attached off-center to the circuit board, but is attached at the half-height rear step. Both the USB connector and the circuit board share the same center line, allowing a printed-circuit board assembly (PCBA) to be symmetric around the center line.

摘要翻译： 通用串行总线（USB）设备具有以电路板中心线为中心的USB插头。 具有闪存的电路板和USB闪存控制器具有焊接USB连接器的金属焊盘。 USB连接器的后部步骤大约是USB连接器插头高度的一半。 后台上的触点焊接到电路板上的金属焊盘，使得USB连接器围绕电路板的边缘居中。 由于笨重的USB连接器不会偏离电路板的中心位置，而是在半高后方的步骤安装，因此闪光装置的整体高度可以减小。 USB连接器和电路板共享相同的中心线，允许印刷电路板组件（PCBA）围绕中心线对称。