公开(公告)号：US20160268139A1

公开(公告)日：2016-09-15

申请号：US14402872

申请日：2014-05-23

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zheng LIU ,  Jang Soon IM

IPC: H01L21/311 ,  H01L29/66 ,  H01J37/32 ,  H01L21/66

CPC classification number: H01L21/31116 ,  H01J37/32082 ,  H01J37/32935 ,  H01J37/32972 ,  H01J2237/334 ,  H01J2237/3343 ,  H01L22/12 ,  H01L22/26 ,  H01L29/66757 ,  H01L29/66765

Abstract: A method for manufacturing an array substrate, a film-etching monitoring and a film-etching monitoring device. The monitoring method comprises: monitoring and recording the transmittance reference value of a film after a film pattern is formed; and monitoring the transmittance present value of the film in real time in the process of etching an overcoating layer to form a through hole after the overcoating layer is formed on the film pattern, and monitoring the etching degree of the film by determining the variation between the transmittance present value and the transmittance reference value. The device comprises a plurality of light sources (3) and a plurality of light-sensitive probes (4) disposed in the chamber. The light sources (3) are configured to irradiate the film on a substrate; and the light-sensitive probes (4) are configured to sense the transmittance of the film.

Abstract translation: 阵列基板的制造方法，薄膜蚀刻监视和薄膜蚀刻监视装置。 监测方法包括：在形成膜图案之后监测和记录膜的透射率参考值; 并且在外涂层形成在膜图案上之后，在蚀刻外涂层的过程中实时监测膜的透射率现值，并通过确定膜的蚀刻程度来监测膜的蚀刻程度 透射率现值和透射率参考值。 该装置包括设置在腔室中的多个光源（3）和多个光敏探针（4）。 光源（3）构造成将膜照射在基板上; 并且感光探针（4）构造成感测膜的透射率。

公开(公告)号：US20140070217A1

公开(公告)日：2014-03-13

申请号：US13963372

申请日：2013-08-09

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Zheng LIU ,  Chunping LONG ,  Pil Seok KIM

IPC: H01L29/786 ,  H01L29/66

CPC classification number: H01L29/78669 ,  H01L29/66757 ,  H01L29/66765

Abstract: The disclosure discloses a thin film transistor and a manufacturing method thereof, an array substrate, and a display device, which can manufacture a thin film transistor with lower contents of impurity at a low temperature. The thin film transistor comprises: a substrate, and an active layer disposed on the substrate, the active layer comprising a source region, a drain region and a channel region, wherein the active layer is formed by depositing an inducing metal on an amorphous silicon layer on the substrate by an atomic layer deposition (ALD) method and then conducting heat treatment on the amorphous silicon layer deposited with the inducing metal so that metal induction crystallization and metal induction lateral crystallization take place in the amorphous silicon layer.

Abstract translation: 本发明公开了一种薄膜晶体管及其制造方法，阵列基板和显示装置，其可以在低温下制造具有较低杂质含量的薄膜晶体管。 所述薄膜晶体管包括：衬底和设置在所述衬底上的有源层，所述有源层包括源极区，漏极区和沟道区，其中所述有源层通过在非晶硅层上沉积诱导金属而形成 通过原子层沉积（ALD）方法在衬底上，然后对沉积有诱导金属的非晶硅层进行热处理，使得金属诱导结晶和金属诱导横向结晶发生在非晶硅层中。