Retention system for electrical connectors
    81.
    发明授权
    Retention system for electrical connectors 失效
    电连接器保持系统

    公开(公告)号:US06361332B1

    公开(公告)日:2002-03-26

    申请号:US09827422

    申请日:2001-04-06

    CPC classification number: H01R12/707 H05K3/341

    Abstract: A retention system is provided for a surface mounted electrical connector on a printed circuit board. A dielectric connector housing is adapted for mounting on a surface of the printed circuit board. A plurality of terminals are mounted on the housing for engaging appropriate circuit traces on the printed circuit board. A retaining clip is mounted on the housing and includes a board mounting tab for solder connection to an appropriate ground trace on the surface of the printed circuit board. The tab mounting tab has an opening. A conductive shield is disposed about portions of the housing and includes a projection extending into the opening in the board mounting tab. Therefore, solder material engages the projection of the shield through the opening in the board mounting tab to thereby mechanically and electrically secure both the retaining clip and the shield to the printed circuit board.

    Abstract translation: 为印刷电路板上的表面安装电连接器提供保持系统。 电介质连接器壳体适于安装在印刷电路板的表面上。 多个端子安装在壳体上用于接合印刷电路板上的适当电路迹线。 保持夹安装在壳体上,并且包括用于焊接连接到印刷电路板表面上的适当接地迹线的板安装突片。 标签安装片有一个开口。 导电屏蔽围绕壳体的部分设置并且包括延伸到板安装突片中的开口中的突起。 因此,焊料材料通过板安装突片中的开口接合屏蔽件的突起,从而机械地和电气地将固定夹和屏蔽件固定到印刷电路板上。

    DRYWALL BRACE AND METHOD FOR INSTALLING
    86.
    发明申请
    DRYWALL BRACE AND METHOD FOR INSTALLING 审中-公开
    干衣柜和安装方法

    公开(公告)号:US20160131304A1

    公开(公告)日:2016-05-12

    申请号:US14059473

    申请日:2013-10-22

    Applicant: James Roberts

    Inventor: James Roberts

    CPC classification number: E04B9/006 F16B13/0808

    Abstract: A drywall brace that is a bar that is flattened on at least one side, with a thin, line or wire such as a multi-strand wire strategically attached on both sides of a mounting aperture in the bar. The thin strand wires are at least as long as two-thirds of the length of the bar. The drywall brace is pushed through an aperture in the sheet of drywall lengthwise, either end first. The flat side of the drywall brace is positioned against the sheet of drywall. The thin line or wire is utilized to position the drywall brace and to hold the thin line or wire until a fastener such as a screw is mounted into the drywall brace. Prior to inserting the drywall brace through the sheet of drywall, a pilot aperture is drilled into the drywall brace midway between the mounting locations of the thin line or wire.

    Abstract translation: 一个干墙支架,其是在至少一个侧面上被平坦化的条,具有细线,线或线,例如多股线,其策略性地附接在杆中的安装孔的两侧。 细绞线至少长达棒长度的三分之二。 干墙支架通过长度方向的干墙板中的孔被推开,任一端先。 干墙支架的平坦侧面位于隔墙板上。 细线或线用于定位干墙支架并保持细线或线,直到诸如螺钉的紧固件安装在干墙支架中。 在将干墙支架插入干式墙板之前,在细线或电线的安装位置之间的中间墙壁上钻出一个导向孔。

    Compression status bit cache with deterministic isochronous latency
    89.
    发明授权
    Compression status bit cache with deterministic isochronous latency 有权
    具有确定性同步延迟的压缩状态位缓存

    公开(公告)号:US08595437B1

    公开(公告)日:2013-11-26

    申请号:US12276147

    申请日:2008-11-21

    Abstract: One embodiment of the present invention sets forth a compression status bit cache with deterministic latency for isochronous memory clients of compressed memory. The compression status bit cache improves overall memory system performance by providing on-chip availability of compression status bits that are used to size and interpret a memory access request to compressed memory. To avoid non-deterministic latency when an isochronous memory client accesses the compression status bit cache, two design features are employed. The first design feature involves bypassing any intermediate cache when the compression status bit cache reads a new cache line in response to a cache read miss, thereby eliminating additional, potentially non-deterministic latencies outside the scope of the compression status bit cache. The second design feature involves maintaining a minimum pool of clean cache lines by opportunistically writing back dirty cache lines and, optionally, temporarily blocking non-critical requests that would dirty already clean cache lines. With clean cache lines available to be overwritten quickly, the compression status bit cache avoids incurring additional miss write back latencies.

    Abstract translation: 本发明的一个实施例针对压缩存储器的同步存储器客户端提出了具有确定性延迟的压缩状态位缓存。 压缩状态位缓存通过提供压缩状态位的片上可用性来提高整体存储器系统性能,压缩状态位用于对存储器访问请求进行大小和解释,并将其解释为压缩存储器。 为了避免同步存储器客户端访问压缩状态位缓存时的非确定性延迟,采用了两个设计特征。 第一个设计功能涉及当压缩状态位缓存读取新的高速缓存行以响应高速缓存读取未命中时绕过任何中间缓存,从而消除在压缩状态位缓存范围之外的额外的潜在的非确定性延迟。 第二个设计功能包括通过机会地写回脏的高速缓存线,以及可选地临时阻止将已经清除高速缓存行的非关键请求,来保持最小的干净的高速缓存行池。 使用干净的缓存线可以快速覆盖,压缩状态位缓存避免了额外的错误回写延迟。

    Method of configuring the quality-of-service profile of a given stream at an access node of a packet communications network
    90.
    发明授权
    Method of configuring the quality-of-service profile of a given stream at an access node of a packet communications network 有权
    在分组通信网络的接入节点处配置给定流的业务质量简档的方法

    公开(公告)号:US08305918B2

    公开(公告)日:2012-11-06

    申请号:US12441824

    申请日:2007-09-18

    Abstract: A method is provided for configuring the service quality profile of a given flow at the access node of a packet communication network to which is connected to the gateway of a receiving user of the flow. The method includes a step where the gateway determines on its own a service quality profile to be associated with the flow, that is triggered upon reception of a packet from the access node, and a step where the service quality profile thus determined is sent to the access node. The profile is used by the access node for transmitting packets intended for the gateway and belonging to the flow in question.

    Abstract translation: 提供了一种用于配置在连接到流的接收用户的网关的分组通信网络的接入节点处的给定流的服务质量简档的方法。 该方法包括一个步骤,其中网关自己确定与从接入节点接收到分组时触发的与流相关联的服务质量简档,以及如此确定的服务质量分布被发送到 接入节点。 该配置文件被接入节点用于传输用于网关的分组,并且属于所讨论的流。

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