公开(公告)号：US20100156577A1

公开(公告)日：2010-06-24

申请号：US12340776

申请日：2008-12-22

申请人： Xuefeng Wang ,  Kuna Venkat Satya Rama Kishore ,  Christopher Fred Keimel ,  Glenn Scott Claydon ,  Kanakasabapathi Subramanian

发明人： Xuefeng Wang ,  Kuna Venkat Satya Rama Kishore ,  Christopher Fred Keimel ,  Glenn Scott Claydon ,  Kanakasabapathi Subramanian

IPC分类号： H01H51/22

CPC分类号： H01H59/0009 ,  H01H1/0036

摘要： A micro electro-mechanical system switch is presented. The switch includes a base substrate having a support surface. An actuating surface having a notch and an electrical contact surface having an extension is provided. The extension is disposed within the notch. A beam is attached to the base substrate. The beam includes an actuatable free end that is configured to flex upon actuation and to make contact with at least a portion of the extension and carry current therethrough.

摘要翻译： 介绍了一种微机电系统开关。 开关包括具有支撑表面的基底。 提供具有凹口和具有延伸部的电接触表面的致动表面。 延伸部位于凹口内。 梁连接到基底基板。 梁包括可致动的自由端，其构造成在致动时弯曲并且与延伸部的至少一部分接触并且携带电流通过其中。

公开(公告)号：US07563692B2

公开(公告)日：2009-07-21

申请号：US11677629

申请日：2007-02-22

申请人： Jeffrey Bernard Fortin ,  Guanghua (George) Wu ,  Kanakasabapathi Subramanian

发明人： Jeffrey Bernard Fortin ,  Guanghua (George) Wu ,  Kanakasabapathi Subramanian

IPC分类号： H01L21/30

CPC分类号： G01L9/0073 ,  G01L1/148

摘要： According to some embodiments, a conducting layer is formed on a first wafer. An insulating layer is formed on a second wafer. The insulating layer includes a cavity and a conducting area may be formed in the second wafer proximate to the cavity. The side of the conducting layer opposite the first wafer is bonded to the side of the insulating layer opposite the second wafer. At least some of the first wafer is then removed, without removing at least some of the conducting layer, to form a conducting diaphragm that is substantially parallel to the second wafer. In this way, an amount of capacitance between the diaphragm and the conducting area may be measured to determine an amount of pressure being applied to the diaphragm.

公开(公告)号：US07560788B2

公开(公告)日：2009-07-14

申请号：US10945399

申请日：2004-09-20

申请人： Jeffrey Fortin ,  Guanghua (George) Wu ,  Kanakasabapathi Subramanian

发明人： Jeffrey Fortin ,  Guanghua (George) Wu ,  Kanakasabapathi Subramanian

IPC分类号： H01L29/78

CPC分类号： G01L9/0073 ,  G01L1/148

摘要： According to some embodiments, a conducting layer is formed on a first wafer. An insulating layer is formed on a second wafer. The insulating layer includes a cavity and a conducting area may be formed in the second wafer proximate to the cavity. The side of the conducting layer opposite the first wafer is bonded to the side of the insulating layer opposite the second wafer. At least some of the first wafer is then removed, without removing at least some of the conducting layer, to form a conducting diaphragm that is substantially parallel to the second wafer. In this way, an amount of capacitance between the diaphragm and the conducting area may be measured to determine an amount of pressure being applied to the diaphragm.

摘要翻译： 根据一些实施例，在第一晶片上形成导电层。 在第二晶片上形成绝缘层。 绝缘层包括空腔，并且导电区域可以形成在靠近空腔的第二晶片中。 与第一晶片相对的导电层的一侧被结合到与第二晶片相对的绝缘层的一侧。 然后去除至少一些第一晶片，而不去除至少一些导电层，以形成基本上平行于第二晶片的导电隔膜。 以这种方式，可以测量隔膜和导电区域之间的电容量，以确定施加到隔膜的压力的量。

公开(公告)号：US20090161277A1

公开(公告)日：2009-06-25

申请号：US11962830

申请日：2007-12-21

申请人： Robert Roesner ,  Kanakasabapathi Subramanian

发明人： Robert Roesner ,  Kanakasabapathi Subramanian

IPC分类号： H02H3/00

CPC分类号： H02H7/1227 ,  H01H1/0036 ,  H01H9/548 ,  H01H2071/008 ,  H01L2224/48139 ,  H01L2224/4846 ,  H01L2924/13055 ,  H01L2924/00

摘要： A device includes at least one semiconductor switching circuit connected to a power source and a load and at least one breaker switch integrated with the at least one semiconductor switching circuit. The breaker circuit may be connected in series with the at least one semiconductor switching circuit and the at least one breaker switch is configured to create an open circuit in less than about twenty microseconds of receipt of a predetermined threshold of semiconductor switch current to thereby prevent damage to the at least one semiconductor switching circuit or housing. A method of preventing damage to a semiconductor switching circuit or device is also presented.

摘要翻译： 一种器件包括连接到电源和负载的至少一个半导体开关电路和与所述至少一个半导体开关电路集成的至少一个断路器开关。 断路器电路可以与所述至少一个半导体开关电路串联连接，并且所述至少一个断路器开关被配置为在接收半导体开关电流的预定阈值的小于约二十微秒内产生开路，从而防止损坏 至少一个半导体开关电路或外壳。 还提出了防止对半导体开关电路或器件的损坏的方法。

公开(公告)号：US20090159410A1

公开(公告)日：2009-06-25

申请号：US11961767

申请日：2007-12-20

申请人： Xuefeng Wang ,  Kanakasabapathi Subramanian ,  Christopher Fred Keimel ,  Marco Francesco Aimi ,  Kuna Venkat Satya Rama Kishore ,  Glenn Scott Claydon ,  Oliver Charles Boomhower ,  Parag Thakre

发明人： Xuefeng Wang ,  Kanakasabapathi Subramanian ,  Christopher Fred Keimel ,  Marco Francesco Aimi ,  Kuna Venkat Satya Rama Kishore ,  Glenn Scott Claydon ,  Oliver Charles Boomhower ,  Parag Thakre

IPC分类号： H01H57/00

CPC分类号： H01H59/0009 ,  H01H2059/0072

摘要： A MEMS switch includes a substrate, a movable actuator coupled to the substrate, a substrate contact, a substrate electrode, and a conductive stopper electrically coupled to the movable actuator and structured to prevent the movable actuator from contacting the substrate electrode while allowing the movable actuator to make contact with the substrate contact.

摘要翻译： MEMS开关包括衬底，耦合到衬底的可移动致动器，衬底接触件，衬底电极和电耦合到可移动致动器的导电阻塞件，并被构造成防止可动致动器接触衬底电极，同时允许可动致动器 与基板接触。

公开(公告)号：US20070138584A1

公开(公告)日：2007-06-21

申请号：US11677624

申请日：2007-02-22

申请人： Jeffrey Fortin ,  George Wu ,  Kanakasabapathi Subramanian

发明人： Jeffrey Fortin ,  George Wu ,  Kanakasabapathi Subramanian

IPC分类号： H01L29/84 ,  H01L21/00

CPC分类号： G01L9/0073 ,  G01L1/148

摘要： According to some embodiments, a conducting layer is formed on a first wafer. An insulating layer is formed on a second wafer. The insulating layer includes a cavity and a conducting area may be formed in the second wafer proximate to the cavity. The side of the conducting layer opposite the first wafer is bonded to the side of the insulating layer opposite the second wafer. At least some of the first wafer is then removed, without removing at least some of the conducting layer, to form a conducting diaphragm that is substantially parallel to the second wafer. In this way, an amount of capacitance between the diaphragm and the conducting area may be measured to determine an amount of pressure being applied to the diaphragm.

公开(公告)号：US07181972B2

公开(公告)日：2007-02-27

申请号：US11023202

申请日：2004-12-27

申请人： Samhita Dasgupta ,  Jeffrey Bernard Fortin ,  Steven Francis LeBoeuf ,  Vinayak Tilak ,  Chayan Mitra ,  Kanakasabapathi Subramanian ,  Steven Alfred Tysoe

发明人： Samhita Dasgupta ,  Jeffrey Bernard Fortin ,  Steven Francis LeBoeuf ,  Vinayak Tilak ,  Chayan Mitra ,  Kanakasabapathi Subramanian ,  Steven Alfred Tysoe

IPC分类号： G01L9/00

CPC分类号： G01H9/00 ,  G01L1/142 ,  G01L1/18 ,  G01L9/0052 ,  G01L9/0073 ,  G01L9/0075 ,  G01L9/008 ,  G01L9/08 ,  G01L19/04

摘要： A sensor, in accordance with aspects of the present technique, is provided. The sensor comprises a membrane formed of gallium nitride. The membrane is disposed on a substrate, which is wet-etched to form a closed cavity. The membrane exhibits both a capacitive response and a piezo-response to an external stimulus. The sensor further includes a circuit for measuring at least one of the capacitive response or the piezo-response. In certain aspects, the sensor may be operable to measure external stimuli, such as, pressure, force and mechanical vibration.

摘要翻译： 提供了根据本技术方面的传感器。 传感器包括由氮化镓形成的膜。 膜被布置在衬底上，其被湿蚀刻以形成闭合腔。 膜对外部刺激具有电容响应和压电响应。 传感器还包括用于测量电容响应或压电响应中的至少一个的电路。 在某些方面，传感器可操作以测量外部刺激，例如压力，力和机械振动。

公开(公告)号：US20060260411A1

公开(公告)日：2006-11-23

申请号：US11495318

申请日：2006-07-31

申请人： Jeffrey Fortin ,  Kuna Kishore ,  Kanakasabapathi Subramanian

发明人： Jeffrey Fortin ,  Kuna Kishore ,  Kanakasabapathi Subramanian

IPC分类号： G01L7/00

CPC分类号： G01L1/148 ,  G01L9/0073

摘要： According to some embodiments, an apparatus includes a substrate that defines a plane. The apparatus also includes a first conducting plate that is substantially normal to the substrate and a second conducting plate that is (i) substantially normal to the substrate and (ii) deformable in response to a pressure.

公开(公告)号：US20060249841A1

公开(公告)日：2006-11-09

申请号：US11340135

申请日：2006-01-26

申请人： Kanakasabapathi Subramanian ,  Noel MacDonald

发明人： Kanakasabapathi Subramanian ,  Noel MacDonald

IPC分类号： H01L23/48

CPC分类号： B81C1/00142 ,  B81B2203/0361 ,  B81C1/00071 ,  B81C1/00111 ,  B81C2201/0112 ,  Y10S977/70 ,  Y10S977/762

摘要： A process cycles between etching and passivating chemistries to create rough sidewalls that are converted into small structures. In one embodiment, a mask is used to define lines in a single crystal silicon wafer. The process creates ripples on sidewalls of the lines corresponding to the cycles. The lines are oxidized in one embodiment to form a silicon wire corresponding to each ripple. The oxide is removed in a further embodiment to form structures ranging from micro sharp tips to photonic arrays of wires. Fluidic channels are formed by oxidizing adjacent rippled sidewalls. The same mask is also used to form other structures for MEMS devices.

公开(公告)号：US07114397B2

公开(公告)日：2006-10-03

申请号：US10799053

申请日：2004-03-12

申请人： Jeffrey Fortin ,  Kuna Kishore ,  Kanakasabapathi Subramanian

发明人： Jeffrey Fortin ,  Kuna Kishore ,  Kanakasabapathi Subramanian

IPC分类号： H04R17/00

CPC分类号： G01L1/148 ,  G01L9/0073

摘要： According to some embodiments, an apparatus includes a substrate that defines a plane. The apparatus also includes a first conducting plate that is substantially normal to the substrate and a second conducting plate that is (i) substantially normal to the substrate and (ii) deformable in response to a pressure.

摘要翻译： 根据一些实施例，一种装置包括限定平面的基板。 该设备还包括基本上垂直于衬底的第一导电板和第二导电板，其是（i）基本上垂直于衬底和（ii）响应于压力而变形的。