公开(公告)号：US08558208B2

公开(公告)日：2013-10-15

申请号：US13097375

申请日：2011-04-29

申请人： Ryota Fujitsuka ,  Masahiro Kiyotoshi ,  Katsuyuki Sekine ,  Mitsuru Sato

发明人： Ryota Fujitsuka ,  Masahiro Kiyotoshi ,  Katsuyuki Sekine ,  Mitsuru Sato

IPC分类号： H01L29/02

CPC分类号： H01L45/146 ,  G11C11/5685 ,  G11C13/0007 ,  G11C2213/72 ,  H01L45/1233

摘要： According to one embodiment, there are provided a first electrode, a second electrode, first and second variable-resistance layers that are arranged between the first electrode and the second electrode, and at least one non variable-resistance layer that is arranged so that positions of the first and second variable-resistance layers between the first electrode and the second electrode are symmetrical to each other.

摘要翻译： 根据一个实施例，提供了布置在第一电极和第二电极之间的第一电极，第二电极，第一和第二可变电阻层，以及至少一个非可变电阻层，其被布置成使得位置 在第一电极和第二电极之间的第一和第二可变电阻层彼此对称。

公开(公告)号：US07964489B2

公开(公告)日：2011-06-21

申请号：US12491984

申请日：2009-06-25

申请人： Masato Koyama ,  Yoshinori Tsuchiya ,  Yuuichi Kamimuta ,  Reika Ichihara ,  Katsuyuki Sekine

发明人： Masato Koyama ,  Yoshinori Tsuchiya ,  Yuuichi Kamimuta ,  Reika Ichihara ,  Katsuyuki Sekine

IPC分类号： H01L21/3205

CPC分类号： H01L27/092 ,  H01L21/28097 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4975 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7833

摘要： A semiconductor device includes: a p-channel MIS transistor including: a first insulating layer formed on a semiconductor region between a source region and a drain region, and containing at least silicon and oxygen; a second insulating layer formed on the first insulating layer, and containing hafnium, silicon, oxygen, and nitrogen, and a first gate electrode formed on the second insulating layer. The first and second insulating layers have a first and second region respectively. The first and second regions are in a 0.3 nm range in the film thickness direction from an interface between the first insulating layer and the second insulating layer. Each of the first and second regions include aluminum atoms with a concentration of 1×1020 cm−3 or more to 1×1022 cm−3 or less.

摘要翻译： 半导体器件包括：p沟道MIS晶体管，包括：第一绝缘层，形成在源极区域和漏极区域之间的半导体区域上，并且至少包含硅和氧; 形成在所述第一绝缘层上并且包含铪，硅，氧和氮的第二绝缘层，以及形成在所述第二绝缘层上的第一栅电极。 第一和第二绝缘层分别具有第一和第二区域。 第一和第二区域在从第一绝缘层和第二绝缘层之间的界面的膜​​厚度方向上为0.3nm的范围内。 第一和第二区域中的每一个包括浓度为1×1020cm-3或更高至1×1022cm-3或更低的铝原子。

公开(公告)号：US07807990B2

公开(公告)日：2010-10-05

申请号：US11753186

申请日：2007-05-24

申请人： Masato Koyama ,  Yoshinori Tsuchiya ,  Yuuichi Kamimuta ,  Reika Ichihara ,  Katsuyuki Sekine

发明人： Masato Koyama ,  Yoshinori Tsuchiya ,  Yuuichi Kamimuta ,  Reika Ichihara ,  Katsuyuki Sekine

IPC分类号： H01L31/00

CPC分类号： H01L27/092 ,  H01L21/28097 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4975 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7833

摘要： A semiconductor device includes: a p-channel MIS transistor including: a first insulating layer formed on a semiconductor region between a source region and a drain region, and containing at least silicon and oxygen; a second insulating layer formed on the first insulating layer, and containing hafnium, silicon, oxygen, and nitrogen, and a first gate electrode formed on the second insulating layer. The first and second insulating layers have a first and second region respectively. The first and second regions are in a 0.3 nm range in the film thickness direction from an interface between the first insulating layer and the second insulating layer. Each of the first and second regions include aluminum atoms with a concentration of 1×1020 cm−3 or more to 1×1022 cm−3 or less.

摘要翻译： 半导体器件包括：p沟道MIS晶体管，包括：第一绝缘层，形成在源极区域和漏极区域之间的半导体区域上，并且至少包含硅和氧; 形成在所述第一绝缘层上并且包含铪，硅，氧和氮的第二绝缘层，以及形成在所述第二绝缘层上的第一栅电极。 第一和第二绝缘层分别具有第一和第二区域。 第一和第二区域在从第一绝缘层和第二绝缘层之间的界面的膜​​厚度方向上为0.3nm的范围内。 第一和第二区域中的每一个包括浓度为1×1020cm-3或更高至1×1022cm-3或更低的铝原子。

公开(公告)号：US20100173487A1

公开(公告)日：2010-07-08

申请号：US12654559

申请日：2009-12-23

申请人： Akio Kaneko ,  Kazuhiro Eguchi ,  Seiji Inumiya ,  Katsuyuki Sekine ,  Motoyuki Sato

发明人： Akio Kaneko ,  Kazuhiro Eguchi ,  Seiji Inumiya ,  Katsuyuki Sekine ,  Motoyuki Sato

IPC分类号： H01L21/28

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28211 ,  H01L27/115 ,  H01L27/1203 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66825 ,  H01L29/78

摘要： A semiconductor apparatus wherein a device formed on a semiconductor substrate comprises a gate insulating film including a high dielectric constant film formed on the substrate and an anti-reaction film formed on the high dielectric constant film, and a gate electrode formed on the anti-reaction film, the high dielectric constant film comprises a film containing at least one of Hf and Zr, and Si and O, or a film containing at least one of Hf and Zr, and Si, O and N, the anti-reaction film comprises an SiO2 film, a film containing SiO2 as a main component and at least one of Hf and Zr, a film containing SiO2 as a main component and N, a film containing SiO2 as a main component, Hf and N, a film containing SiO2 as a main component, Zr and N, or a film containing SiO2 as a main component, Hf, Zr and N.

公开(公告)号：US20100159686A1

公开(公告)日：2010-06-24

申请号：US12659250

申请日：2010-03-02

申请人： Akio Kaneko ,  Seiji Inumiya ,  Katsuyuki Sekine ,  Kazuhiro Eguchi ,  Motoyuki Sato

发明人： Akio Kaneko ,  Seiji Inumiya ,  Katsuyuki Sekine ,  Kazuhiro Eguchi ,  Motoyuki Sato

IPC分类号： H01L21/28

CPC分类号： H01L21/28194 ,  H01L21/28079 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/495 ,  H01L29/513 ,  H01L29/517 ,  H01L2924/0002 ,  H01L2924/00

摘要： A semiconductor device according to the present invention comprises a semiconductor substrate, a gate insulating film which is composed of a material whose main component is a tetravalent metal oxide, a mixture of a tetravalent metal oxide and SiO2, or a mixture of a tetravalent metal oxide and SiON and which containing B when it is in an nMOS structure on the semiconductor substrate or containing at least one of P and As when it is in a pMOS structure on the semiconductor substrate, and a gate electrode made of a metal having a work function of 4 eV to 5.5 eV.

公开(公告)号：US07652341B2

公开(公告)日：2010-01-26

申请号：US11889278

申请日：2007-08-10

申请人： Akio Kaneko ,  Kazuhiro Eguchi ,  Seiji Inumiya ,  Katsuyuki Sekine ,  Motoyuki Sato

发明人： Akio Kaneko ,  Kazuhiro Eguchi ,  Seiji Inumiya ,  Katsuyuki Sekine ,  Motoyuki Sato

IPC分类号： H01L29/78

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28211 ,  H01L27/115 ,  H01L27/1203 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66825 ,  H01L29/78

摘要： A semiconductor apparatus wherein a device formed on a semiconductor substrate comprises a gate insulating film including a high dielectric constant film formed on the substrate and an anti-reaction film formed on the high dielectric constant film, and a gate electrode formed on the anti-reaction film, the high dielectric constant film comprises a film containing at least one of Hf and Zr, and Si and O, or a film containing at least one of Hf and Zr, and Si, O and N, the anti-reaction film comprises an SiO2 film, a film containing SiO2 as a main component and at least one of Hf and Zr, a film containing SiO2 as a main component and N, a film containing SiO2 as a main component, Hf and N, a film containing SiO2 as a main component, Zr and N, or a film containing SiO2 as a main component, Hf, Zr and N.

摘要翻译： 一种半导体装置，其中形成在半导体衬底上的器件包括栅极绝缘膜，该栅极绝缘膜包括形成在基底上的高介电常数膜和形成在高介电常数膜上的抗反应膜，以及形成在抗反应上的栅电极 高介电常数膜包括含有Hf和Zr中的至少一种以及Si和O的膜，或包含Hf和Zr中的至少一种以及Si，O和N的膜，所述抗反应膜包括 SiO 2膜，含有SiO 2作为主要成分的膜和Hf和Zr中的至少一种，以SiO 2为主要成分的膜和N，以SiO 2为主要成分的膜，Hf和N，含有SiO 2作为 主成分Zr和N，或以SiO2为主要成分的膜，Hf，Zr和N.

公开(公告)号：US20080182396A1

公开(公告)日：2008-07-31

申请号：US12003802

申请日：2008-01-02

申请人： Takuya Kobayashi ,  Katsuyuki Sekine ,  Tomonori Aoyama ,  Hiroshi Tomita

发明人： Takuya Kobayashi ,  Katsuyuki Sekine ,  Tomonori Aoyama ,  Hiroshi Tomita

IPC分类号： H01L21/3205

CPC分类号： H01L21/02148 ,  C23C16/401 ,  H01L21/02271 ,  H01L21/0234 ,  H01L21/31645 ,  H01L21/823462 ,  H01L21/823857 ,  H01L29/517 ,  H01L29/66553 ,  H01L29/6656

摘要： A method of manufacturing a semiconductor device includes forming a trench in an interlayer dielectric film on the semiconductor substrate, the trench reaching a semiconductor substrate and having a sidewall made of silicon nitride film; depositing a gate insulation film made of a HfSiO film at a temperature within a range of 200 degrees centigrade to 260 degrees centigrade, so that the HfSiO film is deposited on the semiconductor substrate which is exposed at a bottom surface of the trench without depositing the HfSiO film on the silicon nitride film; and filling the trench with a gate electrode made of metal.

公开(公告)号：US20080128822A1

公开(公告)日：2008-06-05

申请号：US11753186

申请日：2007-05-24

申请人： Masato Koyama ,  Yoshinori Tsuchiya ,  Yuuichi Kamimuta ,  Reika Ichihara ,  Katsuyuki Sekine

发明人： Masato Koyama ,  Yoshinori Tsuchiya ,  Yuuichi Kamimuta ,  Reika Ichihara ,  Katsuyuki Sekine

IPC分类号： H01L27/092

CPC分类号： H01L27/092 ,  H01L21/28097 ,  H01L21/823842 ,  H01L21/823857 ,  H01L29/4975 ,  H01L29/513 ,  H01L29/517 ,  H01L29/7833

摘要： A semiconductor device includes: a p-channel MIS transistor including: a first insulating layer formed on a semiconductor region between a source region and a drain region, and containing at least silicon and oxygen; a second insulating layer formed on the first insulating layer, and containing hafnium, silicon, oxygen, and nitrogen, and a first gate electrode formed on the second insulating layer. The first and second insulating layers have a first and second region respectively. The first and second regions are in a 0.3 nm range in the film thickness direction from an interface between the first insulating layer and the second insulating layer. Each of the first and second regions include aluminum atoms with a concentration of 1×1020 cm−3 or more to 1×1022 cm−3 or less.

摘要翻译： 半导体器件包括：p沟道MIS晶体管，包括：第一绝缘层，形成在源极区域和漏极区域之间的半导体区域上，并且至少包含硅和氧; 形成在所述第一绝缘层上并且包含铪，硅，氧和氮的第二绝缘层，以及形成在所述第二绝缘层上的第一栅电极。 第一和第二绝缘层分别具有第一和第二区域。 第一和第二区域在从第一绝缘层和第二绝缘层之间的界面的膜​​厚度方向上为0.3nm的范围内。 第一和第二区域中的每一个包括浓度为1×10 20 cm -3或更多至1×10 22 cm -3的铝原子， 3 以下。

公开(公告)号：US07265427B2

公开(公告)日：2007-09-04

申请号：US10927115

申请日：2004-08-27

申请人： Akio Kaneko ,  Kazuhiro Eguchi ,  Seiji Inumiya ,  Katsuyuki Sekine ,  Motoyuki Sato

发明人： Akio Kaneko ,  Kazuhiro Eguchi ,  Seiji Inumiya ,  Katsuyuki Sekine ,  Motoyuki Sato

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113

CPC分类号： H01L21/28185 ,  H01L21/28194 ,  H01L21/28211 ,  H01L27/115 ,  H01L27/1203 ,  H01L29/513 ,  H01L29/517 ,  H01L29/665 ,  H01L29/66825 ,  H01L29/78

摘要： A semiconductor apparatus wherein a device formed on a semiconductor substrate comprises a gate insulating film including a high dielectric constant film formed on the substrate and an anti-reaction film formed on the high dielectric constant film, and a gate electrode formed on the anti-reaction film, the high dielectric constant film comprises a film containing at least one of Hf and Zr, and Si and O, or a film containing at least one of Hf and Zr, and Si, O and N, the anti-reaction film comprises an SiO2 film, a film containing SiO2 as a main component and at least one of Hf and Zr, a film containing SiO2 as a main component and N, a film containing SiO2 as a main component, Hf and N, a film containing SiO2 as a main component, Zr and N, or a film containing SiO2 as a main component, Hf, Zr and N.

摘要翻译： 一种半导体装置，其中形成在半导体衬底上的器件包括栅极绝缘膜，该栅极绝缘膜包括形成在基底上的高介电常数膜和形成在高介电常数膜上的抗反应膜，以及形成在抗反应上的栅电极 高介电常数膜包括含有Hf和Zr中的至少一种以及Si和O的膜，或包含Hf和Zr中的至少一种以及Si，O和N的膜，所述抗反应膜包括 SiO 2膜，含有SiO 2作为主要成分的膜和Hf和Zr中的至少一种的膜，含有SiO 2的膜作为 主要成分为N，以SiO 2为主要成分的膜，Hf和N，以SiO 2为主要成分的膜，Zr和N，或膜 含有SiO 2作为主要成分的Hf，Zr和N.

公开(公告)号：US07220681B2

公开(公告)日：2007-05-22

申请号：US11049671

申请日：2005-02-04

申请人： Katsuyuki Sekine ,  Akio Kaneko ,  Motoyuki Sato ,  Seiji Inumiya ,  Kazuhiro Eguchi

发明人： Katsuyuki Sekine ,  Akio Kaneko ,  Motoyuki Sato ,  Seiji Inumiya ,  Kazuhiro Eguchi

IPC分类号： H01L21/31

CPC分类号： C23C16/401 ,  C23C16/56 ,  H01L21/02329 ,  H01L21/3145

摘要： A semiconductor device including a gate insulating film selectively formed on a predetermined region of a semiconductor substrate; a gate electrode formed on said gate insulating film; and a source region and drain region formed, in a surface portion of said semiconductor substrate, on two sides of a channel region positioned below said gate electrode; wherein a carbon concentration in an interface where said gate insulating film is in contact with said gate electrode is not more than 5×1022 atoms/cm3.

摘要翻译： 一种半导体器件，包括选择性地形成在半导体衬底的预定区域上的栅极绝缘膜; 形成在所述栅极绝缘膜上的栅电极; 以及在所述半导体衬底的表面部分中形成在位于所述栅电极下方的沟道区的两侧上的源极区和漏极区; 其中所述栅极绝缘膜与所述栅电极接触的界面中的碳浓度不大于5×10 22原子/ cm 3。