公开(公告)号：US10951840B1

公开(公告)日：2021-03-16

申请号：US16555796

申请日：2019-08-29

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Rui Wang ,  Hiroaki Ebihara ,  Eiichi Funatsu

IPC: H04N5/347 ,  H04N5/378 ,  H01L27/146

Abstract: A photodiode array circuit includes a plurality of photodiode circuits, binning circuitry, and a plurality of output circuits. Each of the plurality of photodiode circuits is coupled to receive a different one of the plurality of transfer control signals as a proximate photodiode circuit, proximate in a first direction. The binning circuitry is coupled to electrically connect the plurality of photodiode circuits into groups of photodiode circuit sense nodes in response to a binning control signal. Each of the plurality of output circuits is coupled to one of the groups of photodiode circuit sense nodes. Each of the plurality of output circuits are coupled to receive the output charge from the photodiode circuits in the one of the groups of photodiode circuit sense nodes and output an output signal to a bitline in response to the output charge and an row select signal.

公开(公告)号：US20210067714A1

公开(公告)日：2021-03-04

申请号：US16555796

申请日：2019-08-29

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Rui Wang ,  Hiroaki Ebihara ,  Eiichi Funatsu

IPC: H04N5/347 ,  H04N5/378

Abstract: A photodiode array circuit includes a plurality of photodiode circuits, binning circuitry, and a plurality of output circuits. Each of the plurality of photodiode circuits is coupled to receive a different one of the plurality of transfer control signals as a proximate photodiode circuit, proximate in a first direction. The binning circuitry is coupled to electrically connect the plurality of photodiode circuits into groups of photodiode circuit sense nodes in response to a binning control signal. Each of the plurality of output circuits is coupled to one of the groups of photodiode circuit sense nodes. Each of the plurality of output circuits are coupled to receive the output charge from the photodiode circuits in the one of the groups of photodiode circuit sense nodes and output an output signal to a bitline in response to the output charge and an row select signal.

公开(公告)号：US20200260031A1

公开(公告)日：2020-08-13

申请号：US16275092

申请日：2019-02-13

Applicant: OmniVision Technologies, Inc.

Inventor： Hiroaki Ebihara ,  Zheng Yang ,  Rui Wang ,  Teijun Dai

IPC: H04N5/378 ,  H04N5/3745

Abstract: An image sensor includes a pixel array including a plurality of pixels. Each pixel is coupled to generate image data in response to incident light. A bit line is coupled to a column of pixels of the pixel array and is separated into first and second portions. Each portion is coupled to a corresponding portion of rows of pixels of the pixel array. A readout circuit coupled to the bit line to read out the image data from the pixel array. The readout circuit includes a cascode device coupled between the first and second portions of the bit line. The cascode device is coupled to be biased to electrically separate the first and second portions of the bit line from one another such that a capacitance of each portion of the bit line does not affect a settling time of an other portion of the bit line.

公开(公告)号：US10510796B1

公开(公告)日：2019-12-17

申请号：US16008434

申请日：2018-06-14

Applicant: OmniVision Technologies, Inc.

Inventor： Rui Wang ,  Zheng Yang ,  Hiroaki Ebihara ,  Tiejun Dai

IPC: H01L27/146 ,  H04N5/355

Abstract: A group of shared pixels comprises: a first shared pixel comprising a first photodiode and a first transfer gate; a second shared pixel comprising a second photodiode and a second transfer gate; a third shared pixel comprising a third photodiode and a third transfer gate; a fourth shared pixel comprising a fourth photodiode and a first transfer gate; a first floating diffusion shared by the first shared pixel and the second shared pixel; a second floating diffusion shared by the third shared pixel and the fourth shared pixel; a capacitor coupled to the first floating diffusion through a first dual conversion gain transistor, and the second floating diffusion through a second dual conversion gain transistor; wherein the capacitor is formed in an area covering most of the first shared pixel, the second shared pixel, the third shared pixel, and the fourth shared pixel.

公开(公告)号：US20190268556A1

公开(公告)日：2019-08-29

申请号：US16222832

申请日：2018-12-17

Applicant: OmniVision Technologies, Inc.

Inventor： Hiroaki Ebihara ,  Rui Wang ,  Zheng Yang ,  Eiichi Funatsu

IPC: H04N5/378 ,  H01L27/146

Abstract: An image sensor includes a pixel array including a plurality of pixels. A bit line coupled to a column of pixels is separated in to a plurality of electrically portions that are coupled to corresponding portions of rows of the pixel array. A first switching circuit of a readout circuit is coupled to the bit line. A first switching circuit is configured to couple a bit line current source to the bit line to provide a DC current coupled to flow through the bit line and through the first switching circuit during a readout operation of a pixel coupled to the bit line. A second switching circuit is configured to couple and ADC to the bit line during the readout operation of the pixel. Substantially none of the DC current provided by the bit line current source flows through the second switching circuit during the readout operation of the pixel.

公开(公告)号：US10291895B2

公开(公告)日：2019-05-14

申请号：US15333653

申请日：2016-10-25

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Olivier Bulteel ,  Rui Wang ,  Zheng Yang

IPC: H04N7/00 ,  H04N13/122 ,  H04N13/254 ,  G01S3/00 ,  G01B11/24

Abstract: A time of flight pixel cell includes a photosensor to sense photons reflected from an object and pixel support circuitry. The pixel support circuitry includes charging control logic coupled to the photosensor to detect when the photosensor senses the photons reflected from the object. The pixel support circuitry also includes a controllable current source coupled to provide a charge current in response to a time of flight signal coupled to be received from the charging control logic. A capacitor is coupled to receive the charge current from the controllable current source in response to the time of flight signal, and voltage on the capacitor is representative of a round trip distance to the object. A counter circuit is coupled to the photosensor to count a number of the photons reflected from the object and received by the photosensor.

公开(公告)号：US10116892B1

公开(公告)日：2018-10-30

申请号：US15853487

申请日：2017-12-22

Applicant: OmniVision Technologies, Inc.

Inventor： Rui Wang ,  Hiroaki Ebihara

IPC: H04N5/235 ,  H04N5/374 ,  H01L27/146 ,  H04N5/378

Abstract: A photodiode is adapted to accumulate image charges in response to incident light. The accumulate image charges are transferred to a floating diffusion, amplified, row selected and the amplified row selected signal is output to a bitline. A bitline enable transistor is coupled to link between the bitline and a bitline source node. A current source is coupled to connect between the bitline source node and a ground. The current source generator sinks adjustable current from the bitline source node to the ground through a cascode transistor and a bias transistor. A cascode hold capacitor is coupled between the cascode control voltage and the ground. A bias hold capacitor is coupled between the bias control voltage and the ground. A bias boost driver is coupled to control the cascode control voltage and the bias control voltage.

公开(公告)号：US20180115762A1

公开(公告)日：2018-04-26

申请号：US15333653

申请日：2016-10-25

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Olivier Bulteel ,  Rui Wang ,  Zheng Yang

IPC: H04N13/00 ,  H04N13/02

CPC classification number: H04N13/122 ,  G01B11/24 ,  G01S3/00 ,  H04N13/254

Abstract: A time of flight pixel cell includes a photosensor to sense photons reflected from an object and pixel support circuitry. The pixel support circuitry includes charging control logic coupled to the photosensor to detect when the photosensor senses the photons reflected from the object. The pixel support circuitry also includes a controllable current source coupled to provide a charge current in response to a time of flight signal coupled to be received from the charging control logic. A capacitor is coupled to receive the charge current from the controllable current source in response to the time of flight signal, and voltage on the capacitor is representative of a round trip distance to the object. A counter circuit is coupled to the photosensor to count a number of the photons reflected from the object and received by the photosensor.

公开(公告)号：US20180103221A1

公开(公告)日：2018-04-12

申请号：US15291917

申请日：2016-10-12

Applicant: OmniVision Technologies, Inc.

Inventor： Tiejun Dai ,  Jing Yin ,  Rui Wang

IPC: H04N5/365 ,  H04N5/3745

Abstract: Systems and methods for fixed pattern noise reduction in image sensors is disclosed herein. An example method may include simultaneously providing a pixel reference voltage of a pixel to a reference sampling capacitor and a signal sampling capacitor, decoupling the reference sampling capacitor from the pixel, providing a signal voltage to the signal sampling capacitor, and decoupling the signal sampling capacitor from the pixel.

公开(公告)号：US09658336B2

公开(公告)日：2017-05-23

申请号：US14464453

申请日：2014-08-20

Applicant: OMNIVISION TECHNOLOGIES, INC.

Inventor： Tianjia Sun ,  Rui Wang ,  Tiejun Dai

IPC: G01S17/89 ,  G01S17/10 ,  G01S7/486

CPC classification number: G01S17/89 ,  G01S7/4863 ,  G01S17/10

Abstract: A programmable current source for use with a time of flight pixel cell includes a first transistor. A current through the first transistor is responsive to a gate-source voltage of the first transistor. A current control circuit is coupled to the first transistor and coupled to a reference current source to selectively couple a reference current of the reference current source through the first transistor during a sample operation. A sample and hold circuit is coupled to the first transistor to sample a gate-source voltage of the first transistor during the sample operation. The sample and hold circuit is coupled to hold the gate-source voltage during a hold operation after the sample operation substantially equal to the gate-source voltage during the sample operation. A hold current through the first transistor during the hold operation is substantially equal to the reference current.