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    VOLTAGE REGULATION FOR INCREASED ROBUSTNESS IN INDIRECT TIME-OF-FLIGHT SENSORS
    2.
    发明公开
    VOLTAGE REGULATION FOR INCREASED ROBUSTNESS IN INDIRECT TIME-OF-FLIGHT SENSORS 审中-公开

    公开(公告)号：US20230147085A1

    公开(公告)日：2023-05-11

    申请号：US17513069

    申请日：2021-10-28

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Zheng Yang ,  Qi Niu ,  Andreas Suess

    IPC: H04N13/254 ,  H03K5/24 ,  H03G3/30 ,  H04N13/296 ,  H04N13/271 ,  G01S17/894

    CPC classification number: H04N13/254 ,  G01S17/894 ,  H03G3/30 ,  H03K5/24 ,  H04N13/271 ,  H04N13/296

    Abstract: A time-of-flight sensor includes an integrated circuit chip in which a voltage regulator and a load are disposed. The load includes a grouping of pixel circuits and modulation driver that is supplied power from the voltage regulator. The grouping of pixel circuits included in a pixel array disposed in the integrated circuit trip. Each one of the pixel circuits includes a photodiode configured to photogenerate charge in response to reflected modulated light, a floating diffusion configured to store a portion of charge photogenerated in the photodiode, and transfer transistor to transfer the portion of charge from the photodiode to the floating diffusion in response to a phase modulation signal generated by the modulation driver. A feedback circuit is coupled between the load and the voltage regulator and is coupled to receive a feedback signal from the feedback circuit in response to the load.

    READOUT ARCHITECTURES FOR BINNED INDIRECT TIME-OF-FLIGHT SENSORS
    3.
    发明申请
    READOUT ARCHITECTURES FOR BINNED INDIRECT TIME-OF-FLIGHT SENSORS 有权

    公开(公告)号：US20230139234A1

    公开(公告)日：2023-05-04

    申请号：US17517971

    申请日：2021-11-03

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Andreas Suess ,  Zheng Yang

    IPC: H04N5/369 ,  H04N5/347 ,  H04N5/378 ,  G01S7/481 ,  G01S17/894

    Abstract: A time-of-flight pixel array includes photodiodes that generate charge in response to incident reflected modulated light. First transfer transistors transfer a first portion of the charge from the photodiodes in response to a first modulation signal and second transfer transistors transfer a second portion of the charge from the photodiodes in response to a second modulation signal, which is an inverted first modulation signal. First floating diffusions are coupled to the first transfer transistors. A binning transistor is coupled between one of the first floating diffusions and another one of the first floating diffusions. A first memory node is coupled to one of the first floating diffusions through a first sample and hold transistor and a second memory node is coupled to another one of the first floating diffusions through a second sample and hold transistor.

    COLUMN AMPLIFIER RESET CIRCUIT WITH COMPARATOR
    4.
    发明申请
    COLUMN AMPLIFIER RESET CIRCUIT WITH COMPARATOR 有权

    公开(公告)号：US20210021774A1

    公开(公告)日：2021-01-21

    申请号：US16516097

    申请日：2019-07-18

    Applicant: OmniVision Technologies, Inc.

    Inventor： Hiroaki Ebihara ,  Zheng Yang

    IPC: H04N5/378 ,  H04N5/3745

    Abstract: A column amplifier with a comparator for use in an image sensor includes an amplifier coupled to receive an input signal representative of an image charge from a pixel cell of the image sensor. An amplifier auto-zero switch is coupled between an input of the amplifier and an output of the amplifier. A feedback capacitor coupled to an input of the amplifier. An amplifier output switch coupled between the output of the amplifier and the feedback capacitor. A comparator includes a first input coupled the amplifier output switch. A comparator auto-zero switch is coupled between the first input of the comparator and an output of the comparator.

    CMOS image sensor with divided bit lines
    6.
    发明授权
    CMOS image sensor with divided bit lines 有权

    公开(公告)号：US10750111B2

    公开(公告)日：2020-08-18

    申请号：US16222832

    申请日：2018-12-17

    Applicant: OmniVision Technologies, Inc.

    Inventor： Hiroaki Ebihara ,  Rui Wang ,  Zheng Yang ,  Eiichi Funatsu

    IPC: H04N5/378 ,  H01L27/146 ,  H04N5/374

    Abstract: An image sensor includes a pixel array including a plurality of pixels. A bit line coupled to a column of pixels is separated in to a plurality of electrically portions that are coupled to corresponding portions of rows of the pixel array. A first switching circuit of a readout circuit is coupled to the bit line. A first switching circuit is configured to couple a bit line current source to the bit line to provide a DC current coupled to flow through the bit line and through the first switching circuit during a readout operation of a pixel coupled to the bit line. A second switching circuit is configured to couple and ADC to the bit line during the readout operation of the pixel. Substantially none of the DC current provided by the bit line current source flows through the second switching circuit during the readout operation of the pixel.

    SMALL PIXELS HAVING DUAL CONVERSION GAIN PROVIDING HIGH DYNAMIC RANGE
    7.
    发明申请
    SMALL PIXELS HAVING DUAL CONVERSION GAIN PROVIDING HIGH DYNAMIC RANGE 审中-公开

    公开(公告)号：US20190386057A1

    公开(公告)日：2019-12-19

    申请号：US16008434

    申请日：2018-06-14

    Applicant: OmniVision Technologies, Inc.

    Inventor： Rui Wang ,  Zheng Yang ,  Hiroaki Ebihara ,  Tiejun Dai

    IPC: H01L27/146

    Abstract: A group of shared pixels comprises: a first shared pixel comprising a first photodiode and a first transfer gate; a second shared pixel comprising a second photodiode and a second transfer gate; a third shared pixel comprising a third photodiode and a third transfer gate; a fourth shared pixel comprising a fourth photodiode and a first transfer gate; a first floating diffusion shared by the first shared pixel and the second shared pixel; a second floating diffusion shared by the third shared pixel and the fourth shared pixel; a capacitor coupled to the first floating diffusion through a first dual conversion gain transistor, and the second floating diffusion through a second dual conversion gain transistor; wherein the capacitor is formed in an area covering most of the first shared pixel, the second shared pixel, the third shared pixel, and the fourth shared pixel.

    COMPARATOR FOR DOUBLE RAMP ANALOG TO DIGITAL CONVERTER
    8.
    发明申请
    COMPARATOR FOR DOUBLE RAMP ANALOG TO DIGITAL CONVERTER 审中-公开

    公开(公告)号：US20180091752A1

    公开(公告)日：2018-03-29

    申请号：US15277648

    申请日：2016-09-27

    Applicant: OmniVision Technologies, Inc.

    Inventor： HIROAKI EBIHARA ,  Zheng Yang

    IPC: H04N5/378 ,  H03K5/24

    CPC classification number: H04N5/378 ,  H03K5/2481

    Abstract: Apparatuses and method for an image sensor with increased analog to digital conversion range and reduced noise are described herein. An example method may include disabling a first auto-zero switch of a comparator, the first auto-zero switch coupled to auto-zero a reference voltage input of the comparator, adjusting an auto-zero offset voltage of a ramp voltage provided to the reference voltage input of the comparator, and disabling a second auto-zero switch of the comparator, the second auto-zero switch coupled to auto-zero a bitline input of the comparator.

    IMAGE SENSOR FLOATING DIFFUSION BOOSTING BY TRANSFER GATES
    9.
    发明申请
    IMAGE SENSOR FLOATING DIFFUSION BOOSTING BY TRANSFER GATES 有权

    公开(公告)号：US20180027194A1

    公开(公告)日：2018-01-25

    申请号：US15216043

    申请日：2016-07-21

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Zheng Yang

    IPC: H04N5/359 ,  H04N5/372 ,  H04N5/374 ,  H04N5/361

    CPC classification number: H04N5/3597 ,  H04N5/361 ,  H04N5/372 ,  H04N5/374 ,  H04N5/3741 ,  H04N5/37457

    Abstract: A shared pixel includes a plurality of transfer gates coupled between respective photodiodes and a shared floating diffusion. Each transfer gate is coupled to receive a transfer control signal to independently control a transfer of the image charge from the corresponding photodiodes to the shared floating diffusion. Each transfer control signal is set to one of an ON value, a first OFF value, and a second OFF value. One of the control signals that is coupled to an active transfer gate is set to the ON value during a transfer operation. The control signals coupled to idle transfer gates are set to the first OFF value during a reset period prior to the transfer operation, and are set to the second OFF value during the transfer operation.

    Method and system for implementing H-banding cancellation in an image sensor
    10.
    发明授权
    Method and system for implementing H-banding cancellation in an image sensor 有权

    公开(公告)号：US09838621B2

    公开(公告)日：2017-12-05

    申请号：US15147741

    申请日：2016-05-05

    Applicant: OMNIVISION TECHNOLOGIES, INC.

    Inventor： Zheng Yang ,  Hiroaki Ebihara

    IPC: H04N5/341 ,  H04N5/374

    CPC classification number: H04N5/341 ,  H04N5/357 ,  H04N5/374 ,  H04N5/378

    Abstract: A method for implementing H-Banding cancellation in an image sensor starts with a pixel array capturing image data. Pixel array includes a plurality of pixels to generate pixel data signals, respectively. ADC circuitry acquires the pixel data signals. ADC circuitry includes a comparator circuitry. In one embodiment, comparator circuitry 310 includes a plurality of comparators. Comparators included in comparator circuitry compare the pixel data signals, respectively, to a ramp signal received from a ramp generator to generate comparator output signals. Adjacent comparators output signals may be opposite in polarity. Other embodiments are described.

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