公开(公告)号：US08472224B2

公开(公告)日：2013-06-25

申请号：US13355833

申请日：2012-01-23

申请人： Ibrahim M. Elfadel ,  Michele M. Franceschini ,  Luis A. Lastras-Montano ,  Thomas Mittelholzer ,  Mayank Sharma

发明人： Ibrahim M. Elfadel ,  Michele M. Franceschini ,  Luis A. Lastras-Montano ,  Thomas Mittelholzer ,  Mayank Sharma

IPC分类号： G11C27/00

CPC分类号： G11C8/10 ,  G11C11/56 ,  G11C11/5678 ,  G11C13/0004 ,  G11C13/0069 ,  G11C27/005 ,  G11C2013/0083

摘要： Selecting bins in a memory by receiving a target cost for performing writes at an analog memory that is capable of storing a range of values. Possible bins that may be created in the range of values and a cost associated with each possible bin are determined. Each possible bin includes one or more of the values. A group of bins are identified, the group of bins are among the possible bins with associated costs that are within a threshold of the target cost. A maximum number of bins are selected from the group of bins that have non-overlapping values. The selected bins are stored along with the values of the selected bins utilized to encode and decode contents of the analog memory.

摘要翻译： 通过接收在能够存储一定范围的值的模拟存储器上执行写入的目标成本来选择存储器中的存储器。 确定可能在值范围内创建的可能的仓和与每个可能仓相关联的成本。 每个可能的仓包括一个或多个值。 识别出一组垃圾箱，这些垃圾箱是可能的垃圾箱，其相关成本在目标成本的阈值之内。 从具有非重叠值的分组组中选择最大数量的分区。 所选择的存储槽与用于对模拟存储器的内容进行编码和解码的所选择的存储器的值一起存储。

公开(公告)号：US20110296274A1

公开(公告)日：2011-12-01

申请号：US13097402

申请日：2011-04-29

申请人： Thomas Mittelholzer ,  Nikolaos Papandreou ,  Charalampos Pozidis

发明人： Thomas Mittelholzer ,  Nikolaos Papandreou ,  Charalampos Pozidis

IPC分类号： G06F11/10

CPC分类号： G06F11/1072

摘要： Methods and apparatus are provided for recording input data in q-level cells of solid-state memory (2), where q>2. Input data words are encoded as respective codewords, each having a plurality of symbols. The coding scheme is such that each symbol can take one of q values corresponding to respective predetermined levels of the q-level cells, and each of the possible input data words is encoded as a codeword with a unique sequence of relative symbol values. The symbols of each codeword are then recorded in respective cells of the solid-state memory by setting each cell to the level corresponding to the recorded symbol value. Input data is thus effectively encoded in the relative positions of cell levels, providing resistance to certain effects of drift noise.

摘要翻译： 提供方法和装置用于在q> 2的固态存储器（2）的q级单元中记录输入数据。 输入数据字被编码为各自具有多个符号的码字。 编码方案使得每个符号可以采用与q级单元的各个预定级别相对应的q个值中的一个，并且每个可能的输入数据字被编码为具有唯一的相对符号值序列的码字。 然后通过将每个单元设置为与记录的符号值对应的电平，将每个码字的符号记录在固态存储器的相应单元中。 因此，输入数据被有效地编码在单元电平的相对位置，提供对漂移噪声的某些影响的抵抗。

公开(公告)号：US20100218070A1

公开(公告)日：2010-08-26

申请号：US12391547

申请日：2009-02-24

申请人： Michele Franceschini ,  John Peter Karidis ,  Luis A. Lastras-Montano ,  Thomas Mittelholzer ,  Mark N. Wegman

发明人： Michele Franceschini ,  John Peter Karidis ,  Luis A. Lastras-Montano ,  Thomas Mittelholzer ,  Mark N. Wegman

IPC分类号： H03M13/00 ,  G11C11/00 ,  G11C7/00 ,  G06F11/00 ,  G06F11/16

CPC分类号： G11C13/0069 ,  G06F11/1012 ,  G11C13/0002 ,  G11C2207/104

摘要： A phase-change memory (PCM) includes a matrix of storage cells, including at least a first group with at least one cell. Each cell includes a phase change material having at least a first resistance value and a second resistance value, such that the first group can have an identical message encoded therein in at least a first way and a second way. The memory also includes a controller configured to encode the identical message in the at least first group the first or second way, based on which way causes the least amount of writing cost, given current levels of the group. Another embodiment of memory includes a matrix of storage cells, including at least a first group with at least one cell. Each of the storage cells has at least two levels, such that each of the storage cells can have an identical message encoded therein in at least a first way and a second way (the cells can be PCM or another technology). Each one of the storage cells is arbitrarily individually changeable among the at least two levels, and each of the cells is cost-asymmetric. A controller encodes the identical message in the at least first group using the first way or the second way, based on which way incurs a least cost when writing the message into the at least one cell of the at least first group, given current levels of the at least first group.

摘要翻译： 相变存储器（PCM）包括存储单元矩阵，至少包括具有至少一个单元的第一组。 每个单元包括具有至少第一电阻值和第二电阻值的相变材料，使得第一组可以以至少第一种方式和第二种方式在其中编码相同的消息。 所述存储器还包括控制器，所述控制器被配置为在所述至少第一组中对所述第一或第二方式的相同消息进行编码，基于哪种方式，给出所述组的当前级别的最小写入成本量。 存储器的另一实施例包括存储单元的矩阵，包括至少一个具有至少一个单元的第一组。 每个存储单元具有至少两个级别，使得每个存储单元可以以至少第一种方式和第二种方式在其中编码相同的消息（该单元可以是PCM或另一种技术）。 存储单元中的每一个在至少两个级别中可任意地单独变化，并且每个单元是成本不对称的。 控制器使用第一种方法或第二种方式在至少第一组中编码相同的消息，基于哪种方式在将消息写入至少第一组的至少一个小区时产生最低成本，给定当前级别 至少第一组。

公开(公告)号：US07694205B2

公开(公告)日：2010-04-06

申请号：US11067851

申请日：2005-02-28

申请人： Roy D. Cideciyan ,  Ajay Dholakia ,  Evangelos S. Eleftheriou ,  Richard L. Galbraith ,  Weldon M. Hanson ,  Thomas Mittelholzer ,  Travis R. Oenning

发明人： Roy D. Cideciyan ,  Ajay Dholakia ,  Evangelos S. Eleftheriou ,  Richard L. Galbraith ,  Weldon M. Hanson ,  Thomas Mittelholzer ,  Travis R. Oenning

IPC分类号： G11C29/00 ,  H03M13/00

CPC分类号： H03M13/45 ,  G11B20/10009 ,  G11B20/10055 ,  G11B20/1833 ,  G11B2020/1863 ,  H03M13/098 ,  H03M13/6343

摘要： A method and apparatus for providing a read channel having combined parity and non-parity post processing is disclosed. A post-processor combines parity and non-parity post processing to make both parity and non-parity corrections so that error events that cannot be detected by parity may be corrected. Non-parity detectable error events are only kept for consideration if their likelihood is above a set threshold.

摘要翻译： 公开了一种用于提供具有组合奇偶校验和非奇偶校验后处理的读通道的方法和装置。 后处理器组合奇偶校验和非奇偶校验后处理以进行奇偶校验和非奇偶校正，从而校正不能被奇偶校验检测到的错误事件。 只有当它们的可能性高于设定的阈值时，才能保持非奇偶校验可检测误差事件。

公开(公告)号：US20060107182A1

公开(公告)日：2006-05-18

申请号：US11286582

申请日：2005-11-25

申请人： Roy Cideciyan ,  Ajay Dholakia ,  Evangelos Eleftheriou ,  Thomas Mittelholzer

发明人： Roy Cideciyan ,  Ajay Dholakia ,  Evangelos Eleftheriou ,  Thomas Mittelholzer

IPC分类号： H03M13/00

CPC分类号： G11B20/1833

摘要： Method and apparatus for decoding data in a data storage system. In operation, a detector generates an output bit stream in dependence on a data block received from a storage subsystem of the data storage system. A post processor connected to the detector generates a first error corrected bit stream in dependence on the output bit stream and the data block. An error correction decoder connected to the post processor generates a second error corrected bit stream in dependence on the first error corrected bit stream and also generates a checksum in dependence of the second error corrected bit stream. A feedback path supplies from the error correction decoder to the post processor pinning data indicative of locations of correct bits in the second error corrected bit stream in the event that the checksum is indicative of errors in the second error corrected bit stream and the second error corrected bit stream comprises at least one correct interleave. The post processor regenerates the first error corrected bit stream in dependence on the pinning data received from the error correction decoder.

摘要翻译： 用于在数据存储系统中解码数据的方法和装置。 在操作中，检测器根据从数据存储系统的存储子系统接收的数据块产生输出位流。 连接到检测器的后处理器根据输出比特流和数据块生成第一纠错比特流。 连接到后处理器的纠错解码器根据第一纠错比特流产生第二纠错比特流，并且还根据第二纠错比特流产生校验和。 在校验和指示第二纠错比特流中的错误并且校正的第二错误的情况下，反馈路径从错误校正解码器向后处理器提供钉扎指示第二纠错比特流中的正确比特的位置的数据 位流包括至少一个正确的交错。 后处理器根据从纠错解码器接收到的钉扎数据重新生成第一纠错比特流。

公开(公告)号：US07030789B1

公开(公告)日：2006-04-18

申请号：US11002970

申请日：2004-12-01

申请人： Roy D. Cideciyan ,  Evangelos S. Eleftheriou ,  Richard Leo Galbraith ,  Thomas Mittelholzer ,  Travis Oenning

发明人： Roy D. Cideciyan ,  Evangelos S. Eleftheriou ,  Richard Leo Galbraith ,  Thomas Mittelholzer ,  Travis Oenning

IPC分类号： H03M7/02

CPC分类号： H03M7/04 ,  G06F11/08 ,  G11B20/1426 ,  G11B2020/1473 ,  H03M5/145 ,  H03M7/06 ,  H03M13/31

摘要： Techniques are provided for applying modulation constraints to data by using periodically changing symbol mappings to replace certain prohibited error prone data patterns. Initially, user data in a first base is mapped to integers of a second base using a base conversion technique. The integers in the second base correspond to symbols. Subsequently, periodically changing symbol mappings are performed during which prohibited symbols generated during base conversion are mapped to permitted symbols. The periodically changing symbol mappings occur in multiple phases, and the prohibited symbols are different in each phase. The resulting data is processed by a precoder in some embodiments.

摘要翻译： 提供了通过使用周期性变化的符号映射来替代某些禁止的易错数据模式来向数据应用调制约束的技术。 最初，使用基本转换技术将第一基站中的用户数据映射到第二基站的整数。 第二个碱基中的整数对应于符号。 随后，执行周期性地改变的符号映射，其中在基本转换期间产生的禁止符号被映射到允许的符号。 周期性变化的符号映射发生在多个阶段，禁止符号在每个阶段都不同。 在一些实施例中，所生成的数据由预编码器处理。

公开(公告)号：US07000167B2

公开(公告)日：2006-02-14

申请号：US10044624

申请日：2002-01-08

申请人： Jon Coker ,  Ajay Dholakia ,  Evangelos S. Eleftheriou ,  Rick Galbraith ,  Thomas Mittelholzer ,  Sedat Oelcer

发明人： Jon Coker ,  Ajay Dholakia ,  Evangelos S. Eleftheriou ,  Rick Galbraith ,  Thomas Mittelholzer ,  Sedat Oelcer

IPC分类号： H03M13/00

CPC分类号： H03M13/112 ,  H03M13/1117 ,  H03M13/1515 ,  H03M13/255 ,  H03M13/2906 ,  H03M13/6331 ,  H03M13/6583

摘要： A method for decoding Low Density Parity Check (LDPC) codes comprises executing a sum product algorithm to recover a set of information bits from an LDPC code represented as a bipartite graph of symbol nodes and check nodes, the sum product algorithm being responsive to input log likelihood ratios associated with the symbol nodes. The check nodes are updated by generating a set of forward difference metrics and a set of backward difference metrics in dependence on the ratios of logarithmic probabilities each associated with a corresponding symbol node of the LDPC code, updating each metric in the set of forward difference metrics in dependence on the absolute value of the log likelihood ratio associated with the symbol node and the absolute value of the previous metric in the set, updating each metric in the set of backward difference metrics in dependence on the absolute value of the log likelihood ratio associated with the symbol node and the absolute value of the previous metric in the set, and generating log likelihood ratios to be propagated back to each symbol node in dependence on the updated sets of forward and backward difference metrics.

公开(公告)号：US20050213241A1

公开(公告)日：2005-09-29

申请号：US10809230

申请日：2004-03-25

申请人： Roy Cideciyan ,  Ajay Dholakia ,  Evangelos Eleftheriou ,  Richard Galbraith ,  Weldon Hanson ,  Thomas Mittelholzer ,  Travis Oenning ,  Michael Ross ,  David Stanek

发明人： Roy Cideciyan ,  Ajay Dholakia ,  Evangelos Eleftheriou ,  Richard Galbraith ,  Weldon Hanson ,  Thomas Mittelholzer ,  Travis Oenning ,  Michael Ross ,  David Stanek

IPC分类号： G11B20/10 ,  G11B5/035 ,  G11B5/09

CPC分类号： G11B5/035

摘要： An apparatus for providing dynamic equalizer optimization is disclosed. The present invention solves the above-described problems by providing equalizer coefficient updates that converge towards the same solution as the direct method without having to first write a known pattern to the disk or requiring any prior knowledge of the data already written on the disk. The adaptive cosine function may be used to modify only a DFIR tap set, only the j and k parameters of a cosine equalizer or to modify both the tap set for a DFIR filter and the j and k parameters of the cosine equalizer. Another algorithm, such as the LMS algorithm, may be used to modify parameters not modified by the cosine algorithm.

摘要翻译： 公开了一种用于提供动态均衡器优化的装置。 本发明通过提供均衡器系数更新来解决上述问题，所述均衡器系数更新收敛于与直接方法相同的解决方案，而不必首先将已知模式写入盘或需要任何已经写入盘中的数据的任何知识。 自适应余弦函数可用于仅修改DFIR抽头集，仅修改余弦均衡器的j和k参数，或者修改DFIR滤波器的抽头集合和余弦均衡器的j和k参数。 可以使用诸如LMS算法的另一种算法来修改未被余弦算法修改的参数。

公开(公告)号：US20050078772A1

公开(公告)日：2005-04-14

申请号：US10683645

申请日：2003-10-10

申请人： Roy Cideciyan ,  Ajay Dholakia ,  Evangelos Eleftheriou ,  Richard Galbraith ,  Thomas Mittelholzer ,  Travis Oenning

发明人： Roy Cideciyan ,  Ajay Dholakia ,  Evangelos Eleftheriou ,  Richard Galbraith ,  Thomas Mittelholzer ,  Travis Oenning

IPC分类号： G11B20/10 ,  H04L27/06

CPC分类号： G11B20/10046 ,  G11B20/10009 ,  G11B20/10055 ,  G11B20/10296

摘要： An apparatus that uses a lengthened equalization target filter with a matched filter metric in a Viterbi detector is disclosed. The equalization target includes a base partial response component, i.e., (1−D2), a fractional coefficient polynomial component to whiten the noise, i.e., (1+p1D+p2D2), and a time-reversed replica of the noise-whitening component. Thus, the time-reversed replica of the noise-whitening component comes from what was formerly a matched filter component.

摘要翻译： 公开了一种在维特比检测器中使用具有匹配滤波器度量的延长均衡目标滤波器的装置。 均衡目标包括基本部分响应分量，即（1-D 2），用于使噪声增白的分数系数多项式分量，即（1 + p1D + p2D 2）和时间反转副本 的增白组分。 因此，噪声增白部件的时间反转复制品来自以前的匹配滤波器部件。

公开(公告)号：US20130335848A1

公开(公告)日：2013-12-19

申请号：US13527473

申请日：2012-06-19

申请人： Katherine T. Blinick ,  Robert A. Hutchins ,  Thomas Mittelholzer ,  Sedat Oelcer

发明人： Katherine T. Blinick ,  Robert A. Hutchins ,  Thomas Mittelholzer ,  Sedat Oelcer

IPC分类号： G11B5/09

CPC分类号： G11B20/10046 ,  G11B5/008 ,  G11B20/10268

摘要： In one embodiment, a data storage system includes a tape channel for reading data from a magnetic tape medium to produce a signal, a noise whitening filter positioned subsequent to the tape channel adapted for receiving the signal, wherein the noise whitening filter is adapted for minimizing variance of its output signal, a soft detector adapted for receiving output from the noise whitening filter, the soft detector adapted for calculating first soft information about each bit of the signal and sending the first soft information to a soft decoder, and the soft decoder positioned subsequent to the soft detector, the soft decoder being adapted for calculating second soft information about each bit of the signal and sending the second soft information to the soft detector. Other systems, methods, and computer program products are described according to more embodiments.

摘要翻译： 在一个实施例中，数据存储系统包括用于从磁带介质读取数据以产生信号的磁带通道，位于适于接收信号的磁带通道之后的噪声白化滤波器，其中噪声增白滤波器适于最小化 其输出信号的方差，适于接收来自噪声白化滤波器的输出的软检测器，软检测器适于计算关于信号的每个位的第一软信息，并将第一软信息发送到软解码器，并且软解码器定位 在软检测器之后，软解码器适于计算关于信号的每个位的第二软信息，并将第二软信息发送到软检测器。 根据更多实施例描述其它系统，方法和计算机程序产品。