公开(公告)号：US11205669B2

公开(公告)日：2021-12-21

申请号：US15311261

申请日：2015-05-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki Okamoto ,  Yoshiyuki Kurokawa ,  Hiroki Inoue ,  Takuro Ohmaru

IPC: H01L27/146 ,  H01L21/8234 ,  H01L27/088 ,  H01L27/12 ,  H01L29/786 ,  H01L31/075 ,  H04N5/225

Abstract: A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.

公开(公告)号：US11202026B2

公开(公告)日：2021-12-14

申请号：US16803166

申请日：2020-02-27

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki Kurokawa

IPC: H04N5/3745 ,  H01L27/146 ,  H04N5/378

Abstract: A semiconductor device with an arithmetic processing function is provided. In the semiconductor device, an imaging portion and an arithmetic portion are electrically connected to each other through an analog processing circuit. The imaging portion includes a pixel array in which pixels used for imaging and reference pixels used for image processing are arranged in a matrix, and a row decoder. The arithmetic portion includes a memory element array in which memory elements and reference memory elements are arranged in a matrix, an analog processing circuit, a row decoder, and a column decoder.

公开(公告)号：US11189656B2

公开(公告)日：2021-11-30

申请号：US16505147

申请日：2019-07-08

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki Kurokawa

IPC: H01L27/146 ,  H04N5/225 ,  H04N5/3745 ,  H01L27/30 ,  H04N5/374 ,  H04N5/378 ,  H01L27/12 ,  H01L29/786

Abstract: An object is to provide an imaging device in which a circuit for reading a signal is provided in a pixel region. The imaging device includes a first pixel and a second pixel. The first pixel is capable of outputting a first signal output from a pixel circuit included in the first pixel or a second signal input from the first pixel in the previous stage, to the first pixel or the second pixel in the next stage. The second pixel is capable of outputting, to the outside, the first signal or the second signal, which is input from the first pixel in the previous stage, or a third signal output from a pixel circuit included in the second pixel.

公开(公告)号：US11139298B2

公开(公告)日：2021-10-05

申请号：US16638799

申请日：2018-08-27

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shintaro Harada ,  Tatsunori Inoue ,  Yoshiyuki Kurokawa ,  Shunpei Yamazaki

IPC: H01L27/00 ,  H01L29/00 ,  H01L27/105 ,  G06N3/063 ,  H01L27/12 ,  H01L29/786

Abstract: An electronic device including a semiconductor device capable of intermittent driving is provided. The electronic device includes a semiconductor device, and the semiconductor device includes a current mirror circuit, a bias circuit, and first to third transistors. The current mirror circuit includes a first output terminal and a second output terminal, and the current mirror circuit is electrically connected to a power supply line through the first transistor. The current mirror circuit has a function of outputting current corresponding to a potential of the first output terminal from the first output terminal and the second output terminal. The bias circuit includes a current source circuit and a current sink circuit, the current source circuit is electrically connected to the second output terminal through the second transistor, and the current sink circuit is electrically connected to the second output terminal through the third transistor. Switching on/off states of the first to third transistors achieves intermittent driving of the semiconductor device.

公开(公告)号：US11003986B2

公开(公告)日：2021-05-11

申请号：US16934110

申请日：2020-07-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Yoshiyuki Kurokawa

IPC: G11C5/14 ,  G06N3/063 ,  G11C7/10 ,  G06N3/08 ,  G11C5/06 ,  H01L29/786 ,  G11C7/16 ,  H01L27/12 ,  G06N3/04 ,  G11C11/403

Abstract: To provide a semiconductor device which can execute the product-sum operation. The semiconductor device includes a first memory cell, a second memory cell, and an offset circuit. First analog data is stored in the first memory cell, and reference analog data is stored in the second memory cell. The first memory cell and the second memory cell supply a first current and a second current, respectively, when a reference potential is applied as a selection signal. The offset circuit has a function of supplying a third current corresponding to a differential current between the first current and the second current. In the semiconductor device, the first memory and the second memory supply a fourth current and a fifth current, respectively, when a potential corresponding to second analog data is applied as a selection signal. By subtracting the third current from a differential current between the fourth current and the fifth current, a current that depends on the sum of products of the first analog data and the second analog data is obtained.

公开(公告)号：US10600792B2

公开(公告)日：2020-03-24

申请号：US15161326

申请日：2016-05-23

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki Kurokawa

IPC: H03K19/177 ,  H03K19/00 ,  H03K19/173 ,  H01L27/11 ,  H01L27/105 ,  H01L27/12 ,  H01L27/118 ,  H01L21/82 ,  H01L27/02 ,  H03K19/17728 ,  H03K19/17748 ,  H03K19/1776 ,  H01L49/02

Abstract: To provide a programmable logic device in which the number of elements per bit in a memory array can be reduced and with which power consumption or operation frequency can be estimated accurately at a testing stage. Provided is a programmable logic device including a plurality of programmable logic elements and a memory array which stores configuration data that determines logic operation executed in the plurality of programmable logic elements. The memory array includes a plurality of memory elements. The memory element includes a node which establishes electrical connection between the programmable logic element and the memory array, a switch for supplying charge whose amount is determined by the configuration data to the node, holding the charge in the node, or releasing the charge from the node, and a plurality of wirings. Capacitance is formed between the node and the wiring.

公开(公告)号：US10582141B2

公开(公告)日：2020-03-03

申请号：US16540343

申请日：2019-08-14

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki Kurokawa

IPC: H04N5/3745 ,  H01L27/146 ,  H04N5/378

Abstract: A semiconductor device with an arithmetic processing function is provided. In the semiconductor device, an imaging portion and an arithmetic portion are electrically connected to each other through an analog processing circuit 24. The imaging portion includes a pixel array 21 in which pixels 20 used for imaging and reference pixels 22 used for image processing are arranged in a matrix, and a row decoder 25. The arithmetic portion includes a memory element array 31 in which memory elements 30 and reference memory elements 32 are arranged in a matrix, an analog processing circuit 34, a row decoder 35, and a column decoder 36.

公开(公告)号：US10535689B2

公开(公告)日：2020-01-14

申请号：US14697662

申请日：2015-04-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yoshiyuki Kurokawa

IPC: H01L27/146 ,  H01L27/12 ,  H01L29/786 ,  H04N5/232 ,  H04N5/335 ,  H04N5/374 ,  H01L31/032 ,  G01J1/44

Abstract: A semiconductor device including photosensor capable of imaging with high resolution is disclosed. The semiconductor device includes the photosensor having a photodiode, a first transistor, and a second transistor. The photodiode generates an electric signal in accordance with the intensity of light. The first transistor stores charge in a gate thereof and converts the stored charge into an output signal. The second transistor transfers the electric signal generated by the photodiode to the gate of the first transistor and holds the charge stored in the gate of the first transistor. The first transistor has a back gate and the threshold voltage thereof is changed by changing the potential of the back gate.

公开(公告)号：US10453380B2

公开(公告)日：2019-10-22

申请号：US15384419

申请日：2016-12-20

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yuki Okamoto ,  Yoshiyuki Kurokawa

IPC: G06T9/00 ,  G09G3/20 ,  G09G3/36 ,  H01L27/12 ,  H01L29/786

Abstract: A low power consumption semiconductor device is provided. The semiconductor device includes a decoder, a signal generation circuit, and a display device. The decoder includes an analysis circuit and an arithmetic circuit. The analysis circuit has a function of determining whether to decode the received first image data using the received data. The signal generation circuit has a function of generating a signal including an instruction on whether to decode the first image data in response to the determination of the analysis circuit. The arithmetic circuit has a function of decoding the first image data in response to the signal. The display device has a function of maintaining a second image displayed on the display device in the case where the first image data is not decoded in the arithmetic circuit.

公开(公告)号：US10223194B2

公开(公告)日：2019-03-05

申请号：US15784669

申请日：2017-10-16

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Takeshi Aoki ,  Yoshiyuki Kurokawa

IPC: G11C11/00 ,  G06F11/10

Abstract: Data corrupted by a soft error is recovered. A storage device includes a first memory cell, a second memory cell, a sense circuit electrically connected to the first memory cell through a first sense line and to the second memory cell through a second sense line, a digital-analog converter circuit electrically connected to the first memory cell and the second memory cell through a bit line, and an analog-digital converter circuit. The digital-analog converter circuit has a function of applying voltages as first signals to the first memory cell and the second memory cell. Even when a soft error occurs in the first memory cell or the second memory cell, the storage device has a function of recovering data corrupted by the soft error because the sense circuit selects and outputs a higher one of the voltages applied to the first memory cell and the second memory cell.