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公开(公告)号：US12156410B2
公开(公告)日：2024-11-26
申请号：US17629804
申请日：2020-07-31
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Shunpei Yamazaki , Hajime Kimura , Takanori Matsuzaki , Tatsuya Onuki , Yuki Okamoto , Hideki Uochi , Satoru Okamoto , Hiromichi Godo , Kazuki Tsuda , Hitoshi Kunitake
Abstract: A highly reliable memory device is provided. On a side surface of a first conductor extending in a first direction, a first insulator, a first semiconductor, a second insulator, a second semiconductor, and a third insulator are provided in this order when seen from the first conductor side. A first region overlapping with a second conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween, and a second region overlapping with a third conductor with the first insulator, the first semiconductor, the second insulator, the second semiconductor, and the third insulator therebetween are provided in the first conductor. In the second region, a fourth conductor is provided between the first insulator and the first semiconductor.
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公开(公告)号：US12080377B2
公开(公告)日：2024-09-03
申请号：US17802281
申请日：2021-03-04
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Yuki Okamoto , Tatsuya Onuki , Munehiro Kozuma , Takanori Matsuzaki
IPC: G11C7/10 , G11C7/12 , G11C8/08 , H01L29/786 , H10B12/00
CPC classification number: G11C7/1096 , G11C7/12 , G11C8/08 , H01L29/7869 , H10B12/31 , H10B12/50
Abstract: A semiconductor device with a novel structure is provided. The semiconductor device includes a plurality of arithmetic blocks each including an arithmetic circuit portion and a memory circuit portion. The arithmetic circuit portion and the memory circuit portion are electrically connected to each other. The arithmetic circuit portion and the memory circuit portion have an overlap region. The arithmetic circuit portion includes, for example, a Si transistor, and the memory circuit portion includes, for example, an OS transistor. The arithmetic circuit portion has a function of performing product-sum operation. The memory circuit portion has a function of retaining weight data. A first driver circuit has a function of writing the weight data to the memory circuit portion. The weight data is written to all the memory circuit portions included in the same column with the use of the first driver circuit.
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3.发明授权公开(公告)号：US11984147B2
公开(公告)日：2024-05-14
申请号：US17602431
申请日：2020-04-15
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Takanori Matsuzaki , Tatsuya Onuki , Yuki Okamoto , Toshiki Hamada
IPC: G11C11/405 , G11C11/4091 , G11C11/56 , H01L29/786
CPC classification number: G11C11/405 , G11C11/4091 , G11C11/5642 , G11C11/565 , H01L29/7869 , H01L29/78696 , G11C2211/5634
Abstract: A semiconductor device storing data as a multilevel potential is provided. The semiconductor device includes a memory cell, first and second reference cells, first and second sense amplifiers, and first to third circuits. The first circuit has a function of outputting, to a first wiring and a third wiring, a first potential corresponding to a first signal output from the memory cell. The second circuit has a function of outputting, to a second wiring, a first reference potential corresponding to a second signal output from the first reference cell. The third circuit has a function of outputting, to the fourth wiring, a second reference potential corresponding to a third signal output from the second reference cell when a second switch is in an off state. The first sense amplifier refers to the first potential and the first reference potential and changes potentials of the first wiring and the second wiring. The second sense amplifier refers to the first potential and the second reference potential and changes potentials of the third wiring and the fourth wiring.
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公开(公告)号：US11973198B2
公开(公告)日：2024-04-30
申请号：US17291000
申请日：2019-11-11
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Takanori Matsuzaki , Kei Takahashi , Takahiko Ishizu , Yuki Okamoto , Minato Ito
CPC classification number: H01M10/425 , H01M50/569 , H02J7/0031 , H03K5/01 , H03K5/24 , H01M2010/4271 , H03K5/2427 , H03K5/2472
Abstract: A semiconductor device capable of detecting a micro-short circuit of a secondary battery is provided. The semiconductor device includes a first source follower, a second source follower, a transistor, a capacitor, and a comparator. A negative electrode potential and a positive electrode potential of the secondary battery are supplied to the semiconductor device, a first potential is input to the first source follower, and a second potential is input to the second source follower. A signal for controlling the conduction state of the transistor is input to a gate of the transistor, and an output potential of the first source follower related to the potential between the positive electrode and the negative electrode of the secondary battery is sampled. The comparator compares the sampled potential with an output potential of the second source follower, whereby the semiconductor device can deal with a secondary battery in which the potential between the positive electrode and the negative electrode is changed by charge and discharge.
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公开(公告)号：US11714138B2
公开(公告)日：2023-08-01
申请号：US17294780
申请日：2019-11-12
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Kei Takahashi , Yuki Okamoto , Minato Ito , Takahiko Ishizu
IPC: H02J7/00 , G01R31/396 , H01M10/48
CPC classification number: G01R31/396 , H01M10/48 , H02J7/0042 , H02J7/00712
Abstract: A semiconductor device that tests and/or monitors each of batteries provided in an assembled battery is provided. The semiconductor device includes a hysteresis comparator and a circuit, and the circuit has a function of setting a high-level side threshold voltage and a low-level side voltage of the hysteresis comparator. The circuit includes first and second capacitors. A first terminal of the first capacitor is electrically connected to a high-level side reference potential input terminal of the hysteresis comparator and a first terminal of the second capacitor is electrically connected to a low-level side reference potential input terminal of the hysteresis comparator. After a first reference potential is input to the high-level side reference potential input terminal and a second reference potential is input to the low-level side reference potential input terminal, a negative electrode of a cell is electrically connected to each second terminal of the first and second capacitors, whereby the potential of each first terminal of the first and second capacitors is changed.
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Patent Agency Ranking
公开(公告)号：US11610544B2
公开(公告)日：2023-03-21
申请号：US17546696
申请日：2021-12-09
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Shintaro Harada , Yoshiyuki Kurokawa , Takeshi Aoki , Yuki Okamoto , Hiroki Inoue , Koji Kusunoki , Yosuke Tsukamoto , Katsuki Yanagawa , Kei Takahashi , Shunpei Yamazaki
Abstract: An electronic device capable of efficiently recognizing a handwritten character is provided.
The electronic device includes a first circuit, a display portion, and a touch sensor. The first circuit includes a neural network. The display portion includes a flexible display. The touch sensor has the function of outputting an input handwritten character as image information to the first circuit. The first circuit has the function of analyzing the image information and converting the image information into character information, and a function of displaying an image including the character information on the display portion. The analysis is performed by inference through the use of the neural network.-
公开(公告)号：US11437000B2
公开(公告)日：2022-09-06
申请号：US17226150
申请日：2021-04-09
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Yuki Okamoto
Abstract: To improve the display quality of a display device. To provide a method of correcting image data input to the display device. To provide a novel image correction method or an image correction system. Machine learning for a neural network correcting image data input to the display device is performed by the following method: second image data based on an image that is displayed on the display device by input of first image data to the display device is obtained; third image data is generated by obtaining a difference between the first image data and the second image data; fourth image data is generated by adding the first image data and the third image data; and a weight coefficient is updated so that output data obtained by input of the first image data to the neural network is close to the fourth image data.
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公开(公告)号：US11177299B2
公开(公告)日：2021-11-16
申请号：US15311261
申请日：2015-05-27
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Yuki Okamoto , Yoshiyuki Kurokawa , Hiroki Inoue , Takuro Ohmaru
IPC: H01L27/146 , H01L21/8234 , H01L27/088 , H01L27/12 , H01L29/786 , H01L31/075 , H04N5/225
Abstract: A solid-state imaging device with high productivity and improved dynamic range is provided. In the imaging device including a photoelectric conversion element having an i-type semiconductor layer, functional elements, and a wiring, an area where the functional elements and the wiring overlap with the i-type semiconductor in a plane view is preferably less than or equal to 35%, further preferably less than or equal to 15%, and still further preferably less than or equal to 10% of the area of the i-type semiconductor in a plane view. Plural photoelectric conversion elements are provided in the same semiconductor layer, whereby a process for separating the respective photoelectric conversion elements can be reduced. The respective i-type semiconductor layers in the plural photoelectric conversion elements are separated by a p-type semiconductor layer or an n-type semiconductor layer.
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公开(公告)号：US10984757B2
公开(公告)日：2021-04-20
申请号：US16607815
申请日：2018-05-07
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor： Yuki Okamoto
Abstract: To improve the display quality of a display device. To provide a method of correcting image data input to the display device. To provide a novel image correction method or an image correction system. Machine learning for a neural network correcting image data input to the display device is performed by the following method: second image data based on an image that is displayed on the display device by input of first image data to the display device is obtained; third image data is generated by obtaining a difference between the first image data and the second image data; fourth image data is generated by adding the first image data and the third image data; and a weight coefficient is updated so that output data obtained by input of the first image data to the neural network is close to the fourth image data.
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公开(公告)号：US10585506B2
公开(公告)日：2020-03-10
申请号：US15218135
申请日：2016-07-25
Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Inventor： Yukinori Shima , Kengo Akimoto , Yuki Okamoto
IPC: G06F3/041 , H01L27/32 , H01L29/786 , G06F3/042 , G09G3/3233 , H01L27/12 , G02F1/133
Abstract: A display device having high visibility regardless of illuminance of external light is provided. A display device with reduced power consumption is provided. The display device includes a first light-receiving circuit including a first light-receiving element; and a pixel circuit including a display element. The first light-receiving circuit and the pixel circuit are formed over the same substrate. The gray level of the display element is changed according to a change in the amount of light to which the first light-receiving element is exposed. In particular, the gray level of the display element is decreased with a decrease in the amount of light exposure.
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