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81.
公开(公告)号:US09105520B2
公开(公告)日:2015-08-11
申请号:US14332468
申请日:2014-07-16
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Munehiro Azami , Shou Nagao , Yoshifumi Tanada
IPC: H01L27/12 , G09G3/36 , G11C19/28 , G02F1/1333
CPC classification number: G11C19/28 , G02F1/13306 , G02F1/1333 , G09G3/36 , G09G3/3688 , G09G2310/0286 , G09G2330/021 , H01L27/1214 , H01L27/124
Abstract: A pulse is inputted to TFTs 101 and 104 so that the TFTs would turn ON and then potential of a node α rises. When the potential of the node α reaches (VDD−VthN), the node α became in a floating state. Accordingly, a TFT 105 then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the TFT 105 further rises due to an operation of capacitance 107 as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the TFT 105.
Abstract translation: 脉冲被输入到TFT 101和104,使得TFT将导通,然后节点α的电位上升。 当节点α的电位达到(VDD-VthN)时,节点α变为浮动状态。 因此,TFT 105然后导通,并且输出节点的电位随着时钟信号达到电平H而升高。另一方面,TFT 105的栅电极的电位由于电容107的操作而进一步上升,因为 输出节点的电位上升,使得输出节点的电位将高于(VDD + VthN)。 因此,由TFT 105的阈值引起的电压下降,输出节点的电位上升到VDD。
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公开(公告)号:US08975632B2
公开(公告)日:2015-03-10
申请号:US14143652
申请日:2013-12-30
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Shunpei Yamazaki , Masahiko Hayakawa , Yoshifumi Tanada , Mitsuaki Osame , Aya Anzai , Ryota Fukumoto
CPC classification number: H01L27/3262 , G09G3/3233 , G09G2310/0251 , G09G2330/04 , H01L27/0248 , H01L27/12 , H01L27/1214 , H01L27/1222 , H01L27/1255 , H01L27/3248 , H01L27/3265 , H01L27/3276 , H01L29/78675
Abstract: Semiconductor elements deteriorate or are destroyed due to electrostatic discharge damage. The present invention provides a semiconductor device in which a protecting means is formed in each pixel. The protecting means is provided with one or a plurality of elements selected from the group consisting of resistor elements, capacitor elements, and rectifying elements. Sudden changes in the electric potential of a source electrode or a drain electrode of a transistor due to electric charge that builds up in a pixel electrode is relieved by disposing the protecting means between the pixel electrode of the light-emitting element and the source electrode or the drain electrode of the transistor. Deterioration or destruction of the semiconductor element due to electrostatic discharge damage is thus prevented.
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公开(公告)号:US08749461B2
公开(公告)日:2014-06-10
申请号:US13894722
申请日:2013-05-15
Applicant: Semiconductor Energy Laboratory Co., Ltd.
Inventor: Yoshifumi Tanada
IPC: G09G3/30
CPC classification number: H01L27/124 , G09G3/30 , G09G3/32 , G09G2300/0404 , G09G2300/0426 , G09G2300/0809 , G09G2320/0233 , G09G2320/0242 , G09G2330/02 , H01L27/15 , H01L27/156 , H01L27/3211 , H01L27/3262 , H01L27/3276 , H01L33/62 , H01L2924/0002 , H01L2924/00
Abstract: A display device in which the current load of wirings are distributed and display variations due to voltage drop are suppressed. An active matrix display device of the invention comprises a first current input terminal, a second current input terminal, and a plurality of current supply lines extending parallel to each other. Each current supply line is connected to a plurality of driving transistors in a line. One end of each current supply line is connected to the first current input terminal via a first wiring intersecting with the current supply lines, and the other end thereof is connected to the second current input terminal via a second wiring intersecting with the current supply lines. Accordingly, a current is supplied to each current supply line from both the first and. the second current input terminals. The first and the second current input terminals are provided separately from each other.
Abstract translation: 布线的电流负载分布的显示装置和由于电压降引起的显示变化被抑制。 本发明的有源矩阵显示装置包括第一电流输入端子,第二电流输入端子以及彼此平行延伸的多个电流供给线路。 每个电源线连接到一行中的多个驱动晶体管。 每个电源线的一端经由与电流供给线相交的第一布线连接到第一电流输入端,并且其另一端经由与电流线相交的第二布线连接到第二电流输入端。 因此,从第一和第二电流输入端子向每个电流供给线路提供电流。 第一和第二电流输入端子彼此分开设置。
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