公开(公告)号：US20100157680A1

公开(公告)日：2010-06-24

申请号：US12638836

申请日：2009-12-15

申请人： Masaaki Higuchi ,  Hiroshi Matsuba ,  Yoshio Ozawa ,  Tetsuya Kai

发明人： Masaaki Higuchi ,  Hiroshi Matsuba ,  Yoshio Ozawa ,  Tetsuya Kai

IPC分类号： G11C16/04 ,  H01L29/792 ,  H01L21/28 ,  G11C11/34

CPC分类号： H01L21/28282

摘要： A semiconductor device includes a semiconductor region, a tunnel insulating film formed on the semiconductor region, a charge-storage insulating film formed on the tunnel insulating film, a block insulating film formed on the charge-storage insulating film, and a control gate electrode formed on the block insulating film, wherein the tunnel insulating film comprises a first region which is formed on a surface of the semiconductor region and contains silicon and oxygen, a second region which contains silicon and nitrogen, a third region which is formed on a back surface of the charge-storage insulating film and contains silicon and oxygen, and an insulating region which is formed at least between the first region and the second region or between the second region and the third region, and contains silicon and nitrogen and oxygen and the second region is formed between the first region and the third region.

摘要翻译： 半导体器件包括半导体区域，形成在半导体区域上的隧道绝缘膜，形成在隧道绝缘膜上的电荷存储绝缘膜，形成在电荷存储绝缘膜上的块绝缘膜和形成的控制栅电极 在所述块绝缘膜上，其中所述隧道绝缘膜包括形成在所述半导体区域的表面上并且包含硅和氧的第一区域，包含硅和氮的第二区域，形成在所述第二区域的背面 的电荷存储绝缘膜并且包含硅和氧，以及至少形成在第一区域和第二区域之间或者在第二区域和第三区域之间形成的绝缘区域，并且包含硅和氮和氧，并且第二 区域形成在第一区域和第三区域之间。

公开(公告)号：US07705391B2

公开(公告)日：2010-04-27

申请号：US11226287

申请日：2005-09-15

申请人： Yoshio Ozawa

发明人： Yoshio Ozawa

IPC分类号： H01L21/336

CPC分类号： H01L29/42324 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/7881

摘要： According to an aspect of the invention, there is provided a semiconductor device including a plurality of memory cells, comprising a plurality of floating gate electrodes which are formed on a tunnel insulating film formed on a semiconductor substrate and have an upper portion which is narrower in a channel width direction than a lower portion, an interelectrode insulating film formed on the floating gate electrodes, and a control gate electrode which is formed on the interelectrode insulating film formed on the floating gate electrodes and partially buried between the floating gate electrodes opposing each other.

摘要翻译： 根据本发明的一个方面，提供了一种包括多个存储单元的半导体器件，包括多个浮置栅电极，形成在形成在半导体衬底上的隧道绝缘膜上，并且具有较窄的上部 沟道宽度方向比下部，形成在浮栅上的电极间绝缘膜，以及控制栅电极，形成在形成在浮置栅电极上且部分地埋在浮置栅电极之间的电极间绝缘膜上， 。

公开(公告)号：US07687346B2

公开(公告)日：2010-03-30

申请号：US11943325

申请日：2007-11-20

申请人： Toshitake Yaegashi ,  Yoshio Ozawa

发明人： Toshitake Yaegashi ,  Yoshio Ozawa

IPC分类号： H01L21/336

CPC分类号： H01L27/115 ,  H01L27/11521

摘要： A semiconductor integrated circuit device includes first, second gate electrodes, first, second diffusion layers, contact electrodes electrically connected to the first diffusion layers, a first insulating film which has concave portions between the first and second gate electrodes and does not contain nitrogen as a main component, a second insulating film which is formed on the first insulating film and does not contain nitrogen as a main component, and a third insulating film formed on the first diffusion layers, first gate electrodes, second diffusion layers and second gate electrodes with the second insulating film disposed therebetween in a partial region. The second insulating film is formed to fill the concave portions and a portion between the first and second gate electrodes has a multi-layered structure containing at least the first and second insulating films.

摘要翻译： 半导体集成电路器件包括：第一，第二栅电极，第一，第二扩散层，电连接到第一扩散层的接触电极;第一绝缘膜，其在第一和第二栅电极之间具有凹入部分，并且不含氮作为 主要成分，形成在第一绝缘膜上并且不含氮作为主要成分的第二绝缘膜，以及形成在第一扩散层上的第三绝缘膜，第一栅电极，第二扩散层和第二栅电极， 第二绝缘膜设置在部分区域之间。 形成第二绝缘膜以填充凹部，并且第一和第二栅电极之间的部分具有至少包含第一绝缘膜和第二绝缘膜的多层结构。

公开(公告)号：US20100019312A1

公开(公告)日：2010-01-28

申请号：US12510577

申请日：2009-07-28

申请人： Katsuyuki SEKINE ,  Akiko Sekihara ,  Kensuke Takano ,  Yoshio Ozawa

发明人： Katsuyuki SEKINE ,  Akiko Sekihara ,  Kensuke Takano ,  Yoshio Ozawa

IPC分类号： H01L29/792 ,  H01L21/28

CPC分类号： H01L29/792 ,  H01L27/11565 ,  H01L27/11578 ,  H01L27/11582 ,  H01L29/513 ,  H01L29/66833 ,  H01L29/7926

摘要： A semiconductor device includes a semiconductor region, a tunnel insulating film formed on a surface of the semiconductor region, a charge-storage insulating film formed on a surface of the tunnel insulating film and containing silicon and nitrogen, a block insulating film formed on a surface of the charge-storage insulating film, and a control gate electrode formed on a surface of the block insulating film, wherein the tunnel insulating film has a first insulating film formed on the surface of the semiconductor region and containing silicon and oxygen, a second insulating film formed on a surface of the first insulating film, and a third insulating film formed on a surface of the second insulating film and containing silicon and oxygen, and a charge trap state in the second insulating film has a lower density than that in the charge-storage insulating film.

摘要翻译： 半导体器件包括半导体区域，形成在半导体区域的表面上的隧道绝缘膜，形成在隧道绝缘膜的表面上并含有硅和氮的电荷存储绝缘膜，形成在表面上的块状绝缘膜 以及形成在所述块绝缘膜的表面上的控制栅电极，其中所述隧道绝缘膜具有形成在所述半导体区域的表面上并且包含硅和氧的第一绝缘膜，第二绝缘膜 形成在第一绝缘膜的表面上的膜，以及形成在第二绝缘膜的表面上并且含有硅和氧的第三绝缘膜，并且第二绝缘膜中的电荷陷阱状态具有比电荷密度低的密度 - 绝缘膜。

公开(公告)号：US07651914B2

公开(公告)日：2010-01-26

申请号：US12176559

申请日：2008-07-21

申请人： Hiroshi Akahori ,  Wakako Takeuchi ,  Yoshio Ozawa

发明人： Hiroshi Akahori ,  Wakako Takeuchi ,  Yoshio Ozawa

IPC分类号： H01L21/336 ,  H01L21/3205 ,  H01L21/28

CPC分类号： H01L29/7881 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524 ,  H01L29/42324 ,  H01L29/513

摘要： A manufacturing method of a nonvolatile semiconductor memory device including: providing a first insulating film and a silicon film on a semiconductor substrate; providing a fifth insulating film containing silicon and oxygen on the silicon film; providing a second insulating film containing silicon and nitrogen on the fifth insulating film; providing a third insulating film on the second insulating film, the third insulating film is composed of a single-layer insulating film containing oxygen or multiple-layer stacked insulating film at least whose films on a top layer and a bottom layer contain oxygen, and relative dielectric constant of the single-layer insulating film and the stacked insulating film being larger than relative dielectric constant of a silicon oxide film; providing a fourth insulating film containing silicon and nitrogen on the third insulating film; and providing a control gate above the fourth insulating film.

摘要翻译： 一种非易失性半导体存储器件的制造方法，包括：在半导体衬底上提供第一绝缘膜和硅膜; 在硅膜上提供含有硅和氧的第五绝缘膜; 在第五绝缘膜上提供含有硅和氮的第二绝缘膜; 在所述第二绝缘膜上提供第三绝缘膜，所述第三绝缘膜由包含氧或多层堆叠绝缘膜的单层绝缘膜组成，所述单层绝缘膜至少其顶层和底层上的膜含有氧，并且相对 单层绝缘膜和叠层绝缘膜的介电常数大于氧化硅膜的相对介电常数; 在所述第三绝缘膜上提供含有硅和氮的第四绝缘膜; 以及在所述第四绝缘膜上方设置控制栅极。

公开(公告)号：US20090269894A1

公开(公告)日：2009-10-29

申请号：US12457892

申请日：2009-06-24

申请人： Yoshio Ozawa ,  Isao Kamioka

发明人： Yoshio Ozawa ,  Isao Kamioka

IPC分类号： H01L21/336

CPC分类号： H01L29/6656 ,  H01L21/28273 ,  H01L27/115 ,  H01L27/11521 ,  H01L29/42324 ,  H01L29/665 ,  H01L29/6653 ,  H01L29/66575 ,  H01L29/66825 ,  H01L29/78

摘要： A semiconductor device includes a semiconductor substrate, a gate insulating film formed on the semiconductor substrate, a gate electrode formed on the gate insulating film, a source/drain diffusion layer formed in the semiconductor substrate at both sides of the gate electrode, and a channel region formed in the semiconductor substrate between a source and a drain of the source/drain diffusion layer and arranged below the gate insulating film, wherein an upper surface of the source/drain diffusion layer is positioned below a bottom surface of the gate electrode, and an upper surface of the channel region is positioned below the upper surface of the source/drain diffusion layer.

摘要翻译： 半导体器件包括半导体衬底，形成在半导体衬底上的栅极绝缘膜，形成在栅极绝缘膜上的栅电极，形成在栅电极两侧的半导体衬底中的源极/漏极扩散层，以及沟道 在所述源极/漏极扩散层的源极和漏极之间形成并布置在所述栅极绝缘膜的下方的所述半导体衬底中的所述源极/漏极扩散层的上表面位于所述栅电极的底表面的下方，以及 沟道区的上表面位于源/漏扩散层的上表面的下方。

公开(公告)号：US20090194808A1

公开(公告)日：2009-08-06

申请号：US12362019

申请日：2009-01-29

申请人： Ryota FUJITSUKA ,  Yoshio Ozawa ,  Katsuaki Natori

发明人： Ryota FUJITSUKA ,  Yoshio Ozawa ,  Katsuaki Natori

IPC分类号： H01L29/792

CPC分类号： H01L27/11568 ,  H01L27/112

摘要： A semiconductor device includes an element region having a channel region, and a unit gate structure inducing a channel in the channel region, the unit gate structure including a tunnel insulating film formed on the element region, a charge storage insulating film formed on the tunnel insulating film, a block insulating film formed on the charge storage insulating film, and a control gate electrode formed on the block insulating film, wherein a distance between the element region and the control gate electrode is shorter at a center portion of the unit gate structure than at both ends thereof, as viewed in a section parallel to a channel width direction.

摘要翻译： 半导体器件包括具有沟道区域的元件区域和在沟道区域中引起沟道的单元栅极结构，所述单元栅极结构包括形成在元件区域上的隧道绝缘膜，形成在隧道绝缘层上的电荷存储绝缘膜 形成在电荷存储绝缘膜上的块绝缘膜和形成在块绝缘膜上的控制栅极电极，其中元件区域和控制栅电极之间的距离在单元栅极结构的中心部分较短 在与通道宽度方向平行的部分中看到的两端。

公开(公告)号：US20090004833A1

公开(公告)日：2009-01-01

申请号：US12146802

申请日：2008-06-26

申请人： Takashi Suzuki ,  Hirokazu Ishida ,  Ichiro Mizushima ,  Yoshio Ozawa ,  Fumiki Aiso ,  Katsuyuki Sekine ,  Takashi Nakao ,  Yoshihiko Saito

发明人： Takashi Suzuki ,  Hirokazu Ishida ,  Ichiro Mizushima ,  Yoshio Ozawa ,  Fumiki Aiso ,  Katsuyuki Sekine ,  Takashi Nakao ,  Yoshihiko Saito

IPC分类号： H01L21/20

CPC分类号： H01L27/115 ,  H01L21/76264 ,  H01L21/84 ,  H01L27/11521 ,  H01L27/11524 ,  H01L27/1203 ,  H01L29/66825

摘要： A method of manufacturing a semiconductor storage device includes providing an opening portion in a plurality of positions in an insulating film formed on a silicon substrate, and thereafter forming an amorphous silicon film on the insulating film, in which the opening portions are formed, and in the opening portions. Then, trenches are formed to divide the amorphous silicon film, in the vicinity of a midpoint between adjacent opening portions, into a portion on one opening portion side and a portion on the other opening portion side. Next, the amorphous silicon film, in which the trenches are formed, is annealed and subjected to solid-phase crystallization to form a single crystal with the opening portions used as seeds, and thereby a silicon single-crystal layer is formed. Then, a memory cell array is formed on the silicon single-crystal layer.

摘要翻译： 一种制造半导体存储装置的方法包括在形成在硅衬底上的绝缘膜中的多个位置提供开口部分，然后在其中形成开口部分的绝缘膜上形成非晶硅膜，并且在 开口部。 然后，形成沟槽，将相邻的开口部之间的中点附近的非晶硅膜分割成一个开口部侧的一部分和另一个开口部侧的一部分。 接着，对其中形成沟槽的非晶硅膜进行退火并进行固相结晶以形成具有用作晶种的开口部分的单晶，从而形成硅单晶层。 然后，在硅单晶层上形成存储单元阵列。

公开(公告)号：US20080261370A1

公开(公告)日：2008-10-23

申请号：US12155272

申请日：2008-06-02

申请人： Isao Kamioka ,  Yoshio Ozawa

发明人： Isao Kamioka ,  Yoshio Ozawa

IPC分类号： H01L21/336

CPC分类号： H01L29/40114 ,  H01L21/3247 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： According to the present invention, there is provided a semiconductor device fabrication method comprising: forming a first insulating film on a semiconductor substrate; forming a first conductive layer on the first insulating film; forming a second insulating film on the first conductive layer in a first processing chamber isolated from an outside; performing a modification process on the second insulating film in the first processing chamber, and unloading the semiconductor substrate from the first processing chamber to the outside; annealing the second insulating film in a second processing chamber; and forming a second conductive layer on the second insulating film.

摘要翻译： 根据本发明，提供一种半导体器件制造方法，包括：在半导体衬底上形成第一绝缘膜; 在所述第一绝缘膜上形成第一导电层; 在与外部隔离的第一处理室中在所述第一导电层上形成第二绝缘膜; 对第一处理室中的第二绝缘膜执行修改处理，并将半导体衬底从第一处理室卸载到外部; 在第二处理室中退火第二绝缘膜; 以及在所述第二绝缘膜上形成第二导电层。

公开(公告)号：US07396721B2

公开(公告)日：2008-07-08

申请号：US11130128

申请日：2005-05-17

申请人： Isao Kamioka ,  Yoshio Ozawa

发明人： Isao Kamioka ,  Yoshio Ozawa

IPC分类号： H01L21/336

CPC分类号： H01L21/28273 ,  H01L21/3247 ,  H01L27/115 ,  H01L27/11521 ,  H01L27/11524

摘要： According to the present invention, there is provided a semiconductor device fabrication method comprising: forming a first insulating film on a semiconductor substrate; forming a first conductive layer on the first insulating film; forming a second insulating film on the first conductive layer in a first processing chamber isolated from an outside; performing a modification process on the second insulating film in the first processing chamber, and unloading the semiconductor substrate from the first processing chamber to the outside; annealing the second insulating film in a second processing chamber; and forming a second conductive layer on the second insulating film.

摘要翻译： 根据本发明，提供一种半导体器件制造方法，包括：在半导体衬底上形成第一绝缘膜; 在所述第一绝缘膜上形成第一导电层; 在与外部隔离的第一处理室中在所述第一导电层上形成第二绝缘膜; 对第一处理室中的第二绝缘膜执行修改处理，并将半导体衬底从第一处理室卸载到外部; 在第二处理室中退火第二绝缘膜; 以及在所述第二绝缘膜上形成第二导电层。