公开(公告)号：US07906387B2

公开(公告)日：2011-03-15

申请号：US12269021

申请日：2008-11-11

申请人： Bong Kil Kim

发明人： Bong Kil Kim

IPC分类号： H01L21/8238

CPC分类号： H01L29/665 ,  H01L29/66568 ,  H01L29/7833

摘要： A method for manufacturing a transistor is disclosed, which is capable of improving matching characteristics of regions within a transistor or among transistors on a wafer, from wafer-to-wafer, or from lot-to-lot. The method includes forming a photoresist pattern on a semiconductor substrate including an isolation layer, forming a drift region by implanting first and second dopant ions using the photoresist pattern as a mask, forming a gate oxide layer on the semiconductor substrate, forming a poly gate on the gate oxide layer, forming source and drain regions a predetermined distance from the poly gate, and forming a silicide layer on the above structure.

摘要翻译： 公开了一种用于制造晶体管的方法，其能够改善晶片内部的区域或晶片之间的晶体管，晶圆到晶片或批次之间的匹配特性。 该方法包括在包括隔离层的半导体衬底上形成光致抗蚀剂图案，通过使用光致抗蚀剂图案作为掩模注入第一和第二掺杂剂离子形成漂移区，在半导体衬底上形成栅极氧化层，形成多晶硅栅极 栅极氧化层，与多晶硅栅极形成预定距离的源极和漏极区域，并在上述结构上形成硅化物层。

公开(公告)号：US07892920B2

公开(公告)日：2011-02-22

申请号：US12249931

申请日：2008-10-12

申请人： Myung-Soo Kim

发明人： Myung-Soo Kim

IPC分类号： H01L21/8242 ,  H01L21/46 ,  H01L21/76 ,  H01L21/301 ,  H01L21/31 ,  H01L21/469

CPC分类号： H01L21/266 ,  H01L21/26586

摘要： A method for manufacturing a semiconductor device which minimizes the line width of a pattern and allows a low temperature oxide film and a thinly formed photoresist film to serve as ion blockers when performing an ion implantation process on the semiconductor substrate.

摘要翻译： 一种制造半导体器件的方法，其在图案的线宽方面最小化，并且当在半导体衬底上执行离子注入工艺时，允许低温氧化物膜和薄的光致抗蚀剂膜用作离子阻挡剂。

公开(公告)号：US07888211B2

公开(公告)日：2011-02-15

申请号：US12544761

申请日：2009-08-20

申请人： Cheon-Man Shim

发明人： Cheon-Man Shim

IPC分类号： H01L21/336

CPC分类号： H01L27/11568 ,  H01L29/42344 ,  H01L29/792

摘要： A method of manufacturing a flash memory device includes preparing a semiconductor substrate comprising a cell area and a peripheral area, forming a first well and an oxide-nitride-oxide (ONO) layer in the cell area, forming a second well in the peripheral area of the semiconductor substrate comprising the first well and forming a first oxide layer in the peripheral area, forming a first polysilicon layer over the ONO layer and the first oxide layer and performing a first etch process to form a memory gate comprising an ONO layer pattern and a first polysilicon pattern in the cell area, forming a second oxide layer pattern and a second polysilicon pattern over either sidewall of the memory gate and forming a gate in the peripheral area, performing a third etch process so that the second oxide layer pattern and the second polysilicon pattern remain over only the one sidewall of the memory gate to form a select gate, and forming a first impurity area in the semiconductor substrate between the memory gates adjacent to each other.

摘要翻译： 一种制造闪速存储器件的方法包括制备包括单元区域和周边区域的半导体衬底，在单元区域中形成第一阱和氧化物 - 氧化物 - 氧化物（ONO）层，在周边区域中形成第二阱 包括所述第一阱并在所述外围区域中形成第一氧化物层，在所述ONO层和所述第一氧化物层上方形成第一多晶硅层，并执行第一蚀刻工艺以形成包括ONO层图案的存储栅极和 在单元区域中的第一多晶硅图案，在存储器栅极的任一侧壁上形成第二氧化物层图案和第二多晶硅图案，并在外围区域中形成栅极，执行第三蚀刻工艺，使得第二氧化物层图案和 第二多晶硅图案仅保留在存储器栅极的一个侧壁上，以形成选择栅极，并且在半导体衬底中形成第一杂质区域 n彼此相邻的存储器门。

公开(公告)号：US07883984B2

公开(公告)日：2011-02-08

申请号：US12620811

申请日：2009-11-18

申请人： Ji-Hwan Park

发明人： Ji-Hwan Park

IPC分类号： H01L21/20 ,  H01L21/8242 ,  H01L21/336

CPC分类号： H01L27/11521

摘要： A method of manufacturing a flash memory device may include forming a trench, defining at least a common source region, on a semiconductor substrate, forming a gate poly over the semiconductor substrate, performing an ion implantation process employing a first photoresist pattern and the gate poly as a mask, wherein the ion implantation process forms a source/drain junction on the semiconductor substrate, forming a recess common source region in the trench by using a second photoresist pattern, and performing an ion implantation process on the recess common source region.

摘要翻译： 一种制造闪速存储器件的方法可以包括在半导体衬底上形成至少限定公共源极区域的沟槽，在半导体衬底上形成栅极多晶硅，执行使用第一光致抗蚀剂图案的离子注入工艺和栅极聚 作为掩模，其中所述离子注入工艺在所述半导体衬底上形成源极/漏极结，通过使用第二光致抗蚀剂图案在所述沟槽中形成凹陷共同源极区域，以及对所述凹部公共源极区域执行离子注入工艺。

公开(公告)号：US07883978B2

公开(公告)日：2011-02-08

申请号：US12247068

申请日：2008-10-07

申请人： Sung Jin Kim

发明人： Sung Jin Kim

IPC分类号： H01L21/336

CPC分类号： H01L27/11521 ,  H01L21/28273

摘要： Disclosed are a semiconductor device and a method for manufacturing the same. The method includes forming a gate layer on a semiconductor substrate; forming a first oxide layer on the semiconductor substrate; forming a second oxide layer on the first oxide layer; exposing the first oxide layer by removing the second oxide layer other than on side surfaces of the gate layer by etching using a photoresist as a mask; and forming junctions in source/drain regions by implanting a high concentration of N-type ions and/or a high concentration of P-type ions using the second oxide layer as a sidewall mask.

摘要翻译： 公开了一种半导体器件及其制造方法。 该方法包括在半导体衬底上形成栅极层; 在所述半导体衬底上形成第一氧化物层; 在所述第一氧化物层上形成第二氧化物层; 通过使用光致抗蚀剂作为掩模进行蚀刻除去除了栅极层的侧表面以外的第二氧化物层来暴露第一氧化物层; 并且通过使用第二氧化物层作为侧壁掩模，通过注入高浓度的N型离子和/或高浓度的P型离子来在源/漏区中形成结。

公开(公告)号：US07883925B2

公开(公告)日：2011-02-08

申请号：US11947496

申请日：2007-11-29

申请人： Jung-Bae Kim

发明人： Jung-Bae Kim

IPC分类号： H01L21/00 ,  H01L27/14

CPC分类号： H01L27/14685 ,  H01L27/14625 ,  H01L27/14636

摘要： An image sensor can include a plurality of photodiodes and a plurality of transistors formed in a semiconductor substrate; a first interlayer insulating layer formed over the semiconductor substrate; a plurality of metal lines formed over the first interlayer insulating layer, electrically connected with the photodiodes and the transistors; a plurality of interlayer insulating layers including an upper interlayer insulating layer and a lower interlayer insulating layer formed over the semiconductor substrate including the metal lines, wherein refractive indexes of the upper interlayer insulating layer and the lower interlayer insulating layer are different from each other; a plurality of color filters formed over the plurality of interlayer insulating layers and which correspond to the photodiodes, respectively; a planarization layer formed over the semiconductor substrate including the color filters; and a plurality of microlenses formed over the planarization layer and which corresponds to the color filters, respectively.

摘要翻译： 图像传感器可以包括形成在半导体衬底中的多个光电二极管和多个晶体管; 形成在所述半导体衬底上的第一层间绝缘层; 多个金属线，形成在所述第一层间绝缘层上，与所述光电二极管和所述晶体管电连接; 多个层间绝缘层，包括形成在包括金属线的半导体衬底上的上层间绝缘层和下层间绝缘层，其中上层间绝缘层和下层间绝缘层的折射率彼此不同; 多个滤色器，分别形成在所述多个层间绝缘层上并分别对应于所述光电二极管; 形成在包括所述滤色器的所述半导体衬底上的平坦化层; 以及形成在平坦化层上并分别对应于滤色器的多个微透镜。

公开(公告)号：US07875489B2

公开(公告)日：2011-01-25

申请号：US12136811

申请日：2008-06-11

申请人： Jeong Su Park

发明人： Jeong Su Park

IPC分类号： H01L21/00

CPC分类号： H01L27/14685 ,  H01L27/14625 ,  H01L27/14647

摘要： A CMOS image sensor and a fabricating method for a semiconductor device are disclosed. Embodiments provide a CMOS image sensor having an improved structure using a light reflection system, with a fabricating method thereof to simplify the fabrication process and maximize a light receiving area. Embodiments may be applied to a semiconductor device having a lamination structure.

摘要翻译： 公开了CMOS图像传感器和半导体器件的制造方法。 实施例提供了具有使用光反射系统的改进结构的CMOS图像传感器，其制造方法简化了制造过程并使光接收面积最大化。 实施例可以应用于具有层压结构的半导体器件。

公开(公告)号：US07869175B2

公开(公告)日：2011-01-11

申请号：US11870902

申请日：2007-10-11

申请人： Sang-Soo Song

发明人： Sang-Soo Song

IPC分类号： H02H9/00

CPC分类号： H01L23/62 ,  H01L27/0266 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： Embodiments relate to a device for protecting a semiconductor IC device from an electrostatic discharge (ESD). According to embodiments, the device may have a rapid response speed and a stable operation against an ESD and may efficiently protect an internal circuit of a semiconductor IC from an ESD voltage lower than a junction breakdown voltage. According to embodiments, the device for protecting the semiconductor IC may include a pad, an internal circuit electrically connected to the pad, and a protection circuit which forms a discharge path between the pad and the internal circuit and disconnects the pad and the internal circuit, when an overvoltage due to an electrostatic discharge is applied to the pad.

摘要翻译： 实施例涉及用于保护半导体IC器件免受静电放电（ESD）的器件。 根据实施例，该装置可以具有对ESD的快速响应速度和稳定操作，并且可以有效地保护半导体IC的内部电路免受低于结击穿电压的ESD电压。 根据实施例，用于保护半导体IC的装置可以包括焊盘，电连接到焊盘的内部电路以及在焊盘和内部电路之间形成放电路径并且断开焊盘和内部电路的保护电路， 当由于静电放电引起的过电压施加到焊盘时。

公开(公告)号：US07868366B2

公开(公告)日：2011-01-11

申请号：US12048634

申请日：2008-03-14

申请人： Min Hyung Lee

发明人： Min Hyung Lee

IPC分类号： H01L33/00 ,  H01L21/00

CPC分类号： H01L27/14632 ,  H01L21/76849 ,  H01L27/14621 ,  H01L27/14627 ,  H01L27/14636 ,  H01L27/14687

摘要： An image sensor is disclosed including a second semiconductor substrate including a metal interconnection and a second interlayer dielectric; a second via penetrating the second interlayer dielectric so that the second via is connected to the metal interconnection; a first semiconductor substrate on the second interlayer dielectric, the first semiconductor substrate having a unit pixel; a pre-metal dielectric on the first semiconductor substrate; a first via penetrating the pre-metal dielectric and the first semiconductor substrate, the first via being electrically connected to the second via; a first interlayer dielectric on the pre-metal dielectric including the first via; a metal interconnection on the first interlayer dielectric and connected to the first via and the unit pixel; a conductive barrier layer on the metal interconnection; and a color filter and a microlens on the first interlayer dielectric in each unit pixel.

摘要翻译： 公开了一种图像传感器，包括：包括金属互连和第二层间电介质的第二半导体衬底; 穿过所述第二层间电介质的第二通孔，使得所述第二通孔连接到所述金属互连; 在所述第二层间电介质上的第一半导体衬底，所述第一半导体衬底具有单位像素; 在所述第一半导体衬底上的预金属电介质; 第一通孔穿过前金属电介质和第一半导体衬底，第一通孔电连接到第二通孔; 包括所述第一通孔的所述预金属电介质上的第一层间电介质; 在所述第一层间电介质上的金属互连，并连接到所述第一通孔和所述单位像素; 金属互连上的导电阻挡层; 以及每个单位像素中的第一层间电介质上的滤色器和微透镜。

公开(公告)号：US07863144B2

公开(公告)日：2011-01-04

申请号：US11847045

申请日：2007-08-29

申请人： Hyeong-Gyun Jeong

发明人： Hyeong-Gyun Jeong

IPC分类号： H01L21/336

CPC分类号： H01L21/2652 ,  H01L21/76232 ,  H01L29/0603

摘要： Embodiments relate to a semiconductor device and a method for manufacturing the device, which suppresses off-current by improving the problem of leakage current due to hump characteristics, making it possible to maximize the reliability of the device. Embodiments relate to a method for manufacturing a semiconductor device including forming a well having two ends in a semiconductor substrate. A shallow trench isolation (STI) is formed by etching both ends of the well and the semiconductor substrate adjacent both ends of the well. A gate oxide film and a photoresist film are formed over the upper surface of the semiconductor substrate including the STI. The photoresist film is patterned for an impurity ion implant into one side area including the edge of the side wall of the STI. A barrier area is formed by implanting an impurity ion into one side area including the side wall edge of the STI using the patterned photoresist film as a mask.

摘要翻译： 实施例涉及一种半导体器件和该器件的制造方法，其通过改善驼峰特性引起的漏电流的问题来抑制截止电流，从而使器件的可靠性最大化。 实施例涉及一种用于制造半导体器件的方法，包括在半导体衬底中形成具有两端的阱。 浅沟槽隔离（STI）通过蚀刻井的两端和与阱的两端相邻的半导体衬底形成。 在包括STI的半导体衬底的上表面上形成栅极氧化膜和光致抗蚀剂膜。 图案化光致抗蚀剂膜用于杂质离子注入到包括STI的侧壁边缘的一个侧面区域中。 通过使用图案化的光致抗蚀剂膜作为掩模将杂质离子注入到包括STI的侧壁边缘的一个侧面区域中来形成屏障区域。