公开(公告)号：US20220416053A1

公开(公告)日：2022-12-29

申请号：US17899071

申请日：2022-08-30

Applicant: STMICROELECTRONICS (TOURS) SAS

Inventor： Samuel MENARD

IPC: H01L29/47 ,  H01L29/73 ,  H01L29/747 ,  H01L29/74 ,  H01L29/732 ,  H01L29/417

Abstract: A vertical semiconductor triode includes a first layer of semiconductor material, the first layer including first and second surfaces, the first surface being in contact with a first electrode forming a Schottky contact.

公开(公告)号：US11462624B2

公开(公告)日：2022-10-04

申请号：US16230137

申请日：2018-12-21

Applicant: STMICROELECTRONICS (TOURS) SAS

Inventor： Samuel Menard

IPC: H01L29/00 ,  H01L29/47 ,  H01L29/73 ,  H01L29/747 ,  H01L29/74 ,  H01L29/732 ,  H01L29/417 ,  H01L29/45

Abstract: A vertical semiconductor triode includes a first layer of semiconductor material, the first layer including first and second surfaces, the first surface being in contact with a first electrode forming a Schottky contact.

公开(公告)号：US20220271030A1

公开(公告)日：2022-08-25

申请号：US17741900

申请日：2022-05-11

Applicant: STMICROELECTRONICS (TOURS) SAS

Inventor： Mohamed BOUFNICHEL

IPC: H01L27/08 ,  H01L27/06 ,  H01L49/02

Abstract: The present disclosure concerns an integrated circuit comprising a substrate, the substrate comprising a first region having a first thickness and a second region having a second thickness smaller than the first thickness, the circuit comprising a three-dimensional capacitor formed inside and on top of the first region, and at least first and second connection terminals formed on the second region, the first and second connection terminals being respectively connected to first and second electrodes of the three-dimensional capacitor.

公开(公告)号：US11380486B2

公开(公告)日：2022-07-05

申请号：US16571738

申请日：2019-09-16

Applicant: STMicroelectronics (Tours) SAS

Inventor： Mohamed Boufnichel

IPC: H01L49/02 ,  H01G4/33 ,  H01G4/30 ,  H01G4/224

Abstract: A vertical capacitor includes a stack of layers conformally covering walls of a first material. The walls extend from a substrate made of a second material different from the first material.

公开(公告)号：US11362204B2

公开(公告)日：2022-06-14

申请号：US16706201

申请日：2019-12-06

Applicant: STMicroelectronics (Tours) SAS

Inventor： Samuel Menard ,  Lionel Jaouen

IPC: H01L29/74 ,  H01L29/749 ,  H01L29/06 ,  H01L29/08

Abstract: A thyristor is formed from a vertical stack of first, second, third, and fourth semiconductor regions of alternated conductivity types. The fourth semiconductor region is interrupted in a gate area of the thyristor. The fourth semiconductor region is further interrupted in a continuous corridor that extends longitudinally from the gate area towards an outer lateral edge of the fourth semiconductor region. A gate metal layer extends over the gate area of the thyristor. A cathode metal layer extends over the fourth semiconductor region but not over the continuous corridor.

公开(公告)号：US11329040B2

公开(公告)日：2022-05-10

申请号：US16359431

申请日：2019-03-20

Applicant: STMicroelectronics (Tours) SAS

Inventor： Patrick Poveda

IPC: H02H9/00 ,  H01L27/02 ,  H01L29/87 ,  H01L29/66 ,  H01L23/60 ,  H01L29/78 ,  H01L29/788 ,  H01L23/522 ,  H01L23/528 ,  H01L27/06 ,  H01L29/06 ,  H01L29/866 ,  H02H9/04 ,  H03H11/04

Abstract: An electronic component includes first and second separate semiconductor regions. A third semiconductor region is arranged under and between the first and second semiconductor regions. The first and third semiconductor regions define electrodes of a first diode. The second and third semiconductor regions define electrodes of a second diode. The first diode is an avalanche diode.

公开(公告)号：US11289391B2

公开(公告)日：2022-03-29

申请号：US16802325

申请日：2020-02-26

Applicant: STMICROELECTRONICS (TOURS) SAS

Inventor： Olivier Ory

IPC: H01L23/31 ,  H01L21/3205 ,  H01L21/56 ,  H01L21/78 ,  H01L29/861

Abstract: A device comprising a semiconductor substrate, an electrically-conductive layer covering the substrate, and an insulating sheath, the conductive layer being in contact with the insulating sheath on the side opposite to the substrate.

公开(公告)号：US20220077850A1

公开(公告)日：2022-03-10

申请号：US17466604

申请日：2021-09-03

Applicant: STMicroelectronics (Tours) SAS

Inventor： Romain PICHON ,  Yannick HAGUE

IPC: H03K17/13 ,  H03K17/76

Abstract: A control device includes a triac and a first diode that is series-connected between the triac and a first terminal of the device that is configured to be connected to a cathode gate of a thyristor. A second terminal of the control device is configured to be connected to an anode of the thyristor. The triac has a gate connected to a third terminal of the device that is configured to receive a control signal. The thyristor is a component part of one or more of a rectifying bridge circuit, an in-rush current limiting circuit or a solid-state relay circuit.

公开(公告)号：US11251478B2

公开(公告)日：2022-02-15

申请号：US16372604

申请日：2019-04-02

Applicant: STMicroelectronics (Tours) SAS

Inventor： Vincent Jarry

IPC: H01M2/02 ,  H01M6/40 ,  H01M10/04 ,  H01M2/30 ,  H01M2/22 ,  H01M50/10 ,  H01M50/116 ,  H01M50/124 ,  H01M50/528 ,  H01M50/543

Abstract: An electronic device includes a base substrate, and a plurality of battery substrates constructed from mica and being attached to the base substrate. An aggregate area of the base substrate is greater than an aggregate area of the plurality of battery substrates. The electronic device also includes a plurality of active battery layers, each active battery layer being attached to a different respective battery substrate, with each active battery layer having a smaller area than its corresponding battery substrate. A film is disposed over the plurality of active battery layers and sized such that the film extends beyond each active battery layer to contact each battery substrate, and such that the film extends beyond each battery substrate to contact the base substrate.

公开(公告)号：US11228239B2

公开(公告)日：2022-01-18

申请号：US16858907

申请日：2020-04-27

Applicant: STMicroelectronics (Tours) SAS ,  STMicroelectronics LTD

Inventor： Ghafour Benabdelaziz ,  Laurent Gonthier

IPC: H02M1/42 ,  H02M7/155 ,  H02M7/217 ,  H02M1/32

Abstract: An AC capacitor is coupled to a totem-pole type PFC circuit. In response to detection of a power input disconnection, the PFC circuit is controlled to discharge the AC capacitor. The PFC circuit includes a resistor and a first MOSFET and a second MOSFET coupled in series between DC output nodes with a common node coupled to the AC capacitor. When the disconnection event is detected, one of the first and second MOSFETs is turned on to discharge the AC capacitor with a current flowing through the resistor and the turned on MOSFET. Furthermore, a thyristor may be simultaneously turned on, with the discharge current flowing through a series coupling of the MOSFET, resistor and thyristor. Disconnection is detected by detecting a zero-crossing failure of an AC power input voltage or lack of input voltage decrease or input current increase in response to MOSFET turn on for a DC input.