公开(公告)号：US11456377B2

公开(公告)日：2022-09-27

申请号：US16862766

申请日：2020-04-30

Applicant: GPOWER SEMICONDUCTOR INC.

Inventor： Chuanjia Wu

IPC: H01L29/778 ,  H01L29/45 ,  H01L29/66

Abstract: The semiconductor device includes: a substrate; a semiconductor layer disposed on one side of the substrate, the semiconductor layer including a channel layer and a barrier layer, and a two-dimensional electron gas being formed at an interface between the channel layer and the barrier layer; a source, a gate, and a drain disposed on one side of the semiconductor layer away from the substrate; and at least two drain junction terminals located on the side of the semiconductor layer away from the substrate and disposed at intervals between the gate and the drain, the at least two drain junction terminals being electrically connected to the drain respectively. In the embodiments of the present application, the on-resistance of the device can be reduced while the current collapse phenomenon is eliminated, thereby improving the long-term reliability of the device.

公开(公告)号：US10439029B2

公开(公告)日：2019-10-08

申请号：US16052442

申请日：2018-08-01

Applicant: Gpower Semiconductor, Inc.

Inventor： Yuan Li ,  Yi Pei ,  Feihang Liu

IPC: H01L29/40 ,  H01L29/778 ,  H01L21/311 ,  H01L29/423 ,  H01L29/20

Abstract: A field plate power device comprises: a substrate; a multilayer semiconductor layer disposed on the substrate; a source electrode, a drain electrode, and a gate electrode located between the source electrode and the drain electrode disposed on the multilayer semiconductor layer; a dielectric layer disposed on the gate electrode, a part of the multilayer semiconductor layer between the gate electrode and the source electrode and another part of the multilayer semiconductor layer between the gate electrode and the drain electrode; a groove disposed in a part of the dielectric layer between the gate electrode and the drain electrode; and a field plate disposed on the groove. The field plate comprises a first portion away from the gate electrode in a horizontal direction, and the first portion has an overall upward tilted shape in the horizontal direction away from the gate electrode.

公开(公告)号：US10978564B2

公开(公告)日：2021-04-13

申请号：US16199055

申请日：2018-11-23

Applicant: Gpower Semiconductor, Inc.

Inventor： Yuan Li

IPC: H01L29/40 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/778 ,  H01L29/20

Abstract: The present disclosure relates to a semiconductor device and a method of manufacturing the same. The semiconductor device includes a semiconductor layer; a source electrode, a drain electrode and a gate electrode located between the source electrode and the drain electrode disposed on a side of the semiconductor layer; at least two dielectrics located between the gate electrode and the drain electrode, wherein a dielectric coefficient of a dielectric adjacent to the gate electrode is greater than that of a dielectric away from the gate electrode and adjacent to the drain electrode.

公开(公告)号：US10312176B2

公开(公告)日：2019-06-04

申请号：US15478200

申请日：2017-04-03

Applicant: Gpower Semiconductor, Inc.

Inventor： Yi Pei ,  Mengjie Zhou

IPC: H01L23/373 ,  H01L29/778 ,  H01L29/78 ,  H01L23/29 ,  H01L29/417 ,  H01L29/20

Abstract: A semiconductor device comprises: a substrate; a multi-layer semiconductor layer located on the substrate, the multi-layer semiconductor layer being divided into an active area and a passive area outside the active area; a gate electrode, a source electrode and a drain electrode all located on the multi-layer semiconductor layer and within the active area; and a heat dissipation layer covering at least one portion of the active area and containing a heat dissipation material. In embodiments of the present invention, a heat dissipation layer covering at least one portion of the active area is provided in the semiconductor device. The arrangement of the heat dissipation layer adds a heat dissipation approach for the semiconductor device in the planar direction, thus the heat dissipation effect of the semiconductor device is improved.

公开(公告)号：US20220231157A1

公开(公告)日：2022-07-21

申请号：US17614972

申请日：2020-06-01

Applicant: GPOWER SEMICONDUCTOR, INC.

Inventor： Junfeng WU ,  Xingxing WU ,  Yi PEI

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/417 ,  H01L29/423 ,  H01L23/495 ,  H01L29/40 ,  H01L29/66

Abstract: The present disclosure discloses a semiconductor device, a method of manufacturing the same, and a semiconductor package structure. The semiconductor device including a substrate, a multilayer semiconductor layer located on one side of the substrate, in which a Two-Dimensional Electron Gas is formed, a first source, a first gate and a first drain located on one side of the multilayer semiconductor layer and located within an active region of the multilayer semiconductor layer, the first gate being located between the first source and the first drain, and a back surface gate contact electrode located on one side of the substrate away from the multilayer semiconductor layer, wherein the first gate is electrically connected to the back surface gate contact electrode. A signal is provided from the back surface of the semiconductor device to the first gate, to reduce the parasitic inductance and parasitic resistance caused by the device during the packaging process.

公开(公告)号：US10256333B2

公开(公告)日：2019-04-09

申请号：US15462319

申请日：2017-03-17

Applicant: Gpower Semiconductor, Inc.

Inventor： Yi Pei

IPC: H01L29/15 ,  H01L29/778 ,  H01L29/06 ,  H01L29/47 ,  H01L29/66 ,  H01L29/40 ,  H01L29/20

Abstract: The embodiments of the present invention disclose a high electron mobility transistor, comprising: a substrate; a channel layer located on the substrate; a barrier layer located on the channel layer; a source electrode, a drain electrode, and a schottky gate electrode located between the source electrode and the drain electrode, all located on the barrier layer; and at least one semiconductor field ring located on the barrier layer and between the schottky gate electrode and the drain electrode. In the embodiments of the present invention, a concentration of two-dimensional electron gas at an interface between a barrier layer and a channel layer can be adjusted. Therefore, the concentration effect of the electric field at an edge of a gate is effectively improved, and the breakdown voltage of high electron mobility transistors is increased.

公开(公告)号：US10163811B2

公开(公告)日：2018-12-25

申请号：US15251594

申请日：2016-08-30

Applicant: Gpower Semiconductor, Inc.

Inventor： Shufeng Zhao

IPC: H01L23/552 ,  H01L25/065 ,  H01L23/057 ,  H01L23/373 ,  H01L23/64 ,  H01L23/00 ,  H01L29/16 ,  H01L29/20 ,  H01L29/205 ,  H01L29/778 ,  H01L29/78 ,  H01L23/495 ,  H01L29/417 ,  H01L25/16

Abstract: A semiconductor package structure comprises: a high-voltage depletion type semiconductor transistor comprising a source electrode, a gate electrode and a drain electrode; a low-voltage enhancement type semiconductor transistor comprising a source electrode, a gate electrode and a drain electrode; a shell comprising a cavity for receiving the high-voltage depletion type semiconductor transistor and the low-voltage enhancement type semiconductor transistor, and a high-voltage terminal, a first low-voltage terminal and a second low-voltage terminal; and cascade circuits comprising a supporting sheet having a conductive surface. The source electrode of the high-voltage depletion type transistor and the drain electrode of the low-voltage enhancement type semiconductor transistor are fixed to the conductive surface of the supporting sheet and electrically connected to each other through the conductive surface of the supporting sheet. A side of the supporting sheet away from the conductive surface is fixed to the cavity of the shell.

公开(公告)号：US10103219B2

公开(公告)日：2018-10-16

申请号：US15473572

申请日：2017-03-29

Applicant: Gpower Semiconductor, Inc.

Inventor： Yi Pei ,  Yuan Li ,  Chuanjia Wu

IPC: H01L29/06 ,  H01L29/778 ,  H01L29/205 ,  H01L29/20 ,  H01L29/66 ,  H01L21/3065 ,  H01L21/308

Abstract: The present disclosure discloses a power semiconductor device and a method for manufacturing the same. The power semiconductor device comprises: a substrate, a channel layer, a barrier layer, a source electrode, a drain electrode, a gate electrode, and a junction termination structure located on the barrier layer. The power semiconductor device extends in a first direction from an edge of a side of the gate electrode close to the drain electrode to the drain electrode, the junction termination structure at least comprises a first region close to the gate electrode and a second region away from the gate electrode and the thickness of the first region is greater than that of the second region in a second direction perpendicular to the barrier layer. The junction termination structure can effectively improve the distribution of an electric field of the barrier layer and hence increase the breakdown voltage of the device.

公开(公告)号：US20230396185A1

公开(公告)日：2023-12-07

申请号：US18250906

申请日：2021-10-28

Applicant: GPOWER SEMICONDUCTOR, INC.

Inventor： Mao HU ,  Yi PEI

IPC: H02M7/483 ,  H02M7/5387 ,  H02M1/44

CPC classification number: H02M7/4833 ,  H02M1/44 ,  H02M7/53871

Abstract: The present disclosure discloses a dual output energy conversion device, modulation method, and power supply device which can enhance the bus voltage boosting capability of the conversion device by using a first electric energy storage module, so that it can be used in a wider input voltage range. A first conversion output circuit and a second conversion output circuit are set, and voltage stress of all switching tubes is reduced to half of the direct current bus voltage, which can greatly reduce the system EMI of the conversion device in high-frequency applications, and improve the power conversion efficiency of the device. The dual output energy conversion device only needs to realize the control of one-stage power conversion, and has a simple control structure.

公开(公告)号：US20220285565A1

公开(公告)日：2022-09-08

申请号：US17632697

申请日：2020-08-05

Applicant: GPOWER SEMICONDUCTOR, INC.

Inventor： Guangmin DENG ,  Yi PEI

IPC: H01L29/872 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/417

Abstract: The present disclosure discloses a semiconductor device and a method for preparing the same. The semiconductor device includes a substrate, a doped epitaxial layer located on one side of the substrate, a channel layer located on one side of the doped epitaxial layer away from the substrate, a potential barrier layer located on one side of the channel layer away from the doped epitaxial layer, and a first electrode and a second electrode located on one side of the potential barrier layer away from the channel layer, wherein the first electrode penetrates the potential barrier layer, the channel layer and part of the doped epitaxial layer, the first electrode forms a Schottky contact with the channel layer, and a resistance of the part of the doped epitaxial layer in contact with the first electrode is greater than a resistance of the channel layer.