公开(公告)号：US20170104063A1

公开(公告)日：2017-04-13

申请号：US15388817

申请日：2016-12-22

Applicant: Gpower Semiconductor, Inc.

Inventor： Naiqian ZHANG ,  Feihang LIU ,  Yi PEI

IPC: H01L29/06 ,  H01L29/778 ,  H01L23/528 ,  H01L29/08 ,  H01L23/48

CPC classification number: H01L29/0696 ,  H01L23/481 ,  H01L23/5286 ,  H01L29/0847 ,  H01L29/16 ,  H01L29/1602 ,  H01L29/1608 ,  H01L29/20 ,  H01L29/2003 ,  H01L29/24 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/42316 ,  H01L29/778 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device comprises an active region and a passive region located outside the active region. The active region comprises a plurality of active region units. At least one pair of adjacent active region units do not completely overlap in a length direction of the semiconductor device.

公开(公告)号：US20220231157A1

公开(公告)日：2022-07-21

申请号：US17614972

申请日：2020-06-01

Applicant: GPOWER SEMICONDUCTOR, INC.

Inventor： Junfeng WU ,  Xingxing WU ,  Yi PEI

IPC: H01L29/778 ,  H01L29/20 ,  H01L29/417 ,  H01L29/423 ,  H01L23/495 ,  H01L29/40 ,  H01L29/66

Abstract: The present disclosure discloses a semiconductor device, a method of manufacturing the same, and a semiconductor package structure. The semiconductor device including a substrate, a multilayer semiconductor layer located on one side of the substrate, in which a Two-Dimensional Electron Gas is formed, a first source, a first gate and a first drain located on one side of the multilayer semiconductor layer and located within an active region of the multilayer semiconductor layer, the first gate being located between the first source and the first drain, and a back surface gate contact electrode located on one side of the substrate away from the multilayer semiconductor layer, wherein the first gate is electrically connected to the back surface gate contact electrode. A signal is provided from the back surface of the semiconductor device to the first gate, to reduce the parasitic inductance and parasitic resistance caused by the device during the packaging process.

公开(公告)号：US20180158965A1

公开(公告)日：2018-06-07

申请号：US15637585

申请日：2017-06-29

Applicant: Gpower Semiconductor, Inc.

Inventor： Yi PEI ,  Qiang LIU

IPC: H01L29/872 ,  H01L29/20 ,  H01L29/205

Abstract: The present disclosure provides a schottky barrier rectifier, comprising: a communication layer; a drift layer provided on a side of the communication layer and forming a heterojunction structure together with the communication layer; anode metal provided on a side of the drift layer away from the communication layer; and cathode metal provided on a side of the communication layer away from the drift layer. The drift layer is provided with a first area, which extends in a direction of thickness thereof, between a surface of the drift layer away from the communication layer and a surface thereof close to the communication layer, the first are a containing a first metal element and the content of the first metal element in the first area changing in the direction of thickness. The rectifier of the present disclosure uses polarized charges formed by a heterojunction, and thus the breakdown voltage of devices may be improved.

公开(公告)号：US20180337239A1

公开(公告)日：2018-11-22

申请号：US16052442

申请日：2018-08-01

Applicant: Gpower Semiconductor, Inc.

Inventor： Yuan LI ,  Yi PEI ,  Feihang LIU

IPC: H01L29/40 ,  H01L29/778 ,  H01L21/311 ,  H01L29/20 ,  H01L29/423

CPC classification number: H01L29/402 ,  H01L21/31144 ,  H01L29/2003 ,  H01L29/401 ,  H01L29/42316 ,  H01L29/4236 ,  H01L29/42368 ,  H01L29/42376 ,  H01L29/7783 ,  H01L29/7786

Abstract: A field plate power device comprises: a substrate; a multilayer semiconductor layer disposed on the substrate; a source electrode, a drain electrode, and a gate electrode located between the source electrode and the drain electrode disposed on the multilayer semiconductor layer; a dielectric layer disposed on the gate electrode, a part of the multilayer semiconductor layer between the gate electrode and the source electrode and another part of the multilayer semiconductor layer between the gate electrode and the drain electrode; a groove disposed in a part of the dielectric layer between the gate electrode and the drain electrode; and a field plate disposed on the groove. The field plate comprises a first portion away from the gate electrode in a horizontal direction, and the first portion has an overall upward tilted shape in the horizontal direction away from the gate electrode.

公开(公告)号：US20180331235A1

公开(公告)日：2018-11-15

申请号：US15976165

申请日：2018-05-10

Applicant: Gpower Semiconductor, Inc.

Inventor： Yi PEI ,  Xiaoyan PEI

IPC: H01L29/872 ,  H01L29/40 ,  H01L29/66 ,  H01L21/765 ,  H01L29/778

CPC classification number: H01L29/872 ,  H01L21/765 ,  H01L29/404 ,  H01L29/66143 ,  H01L29/7787

Abstract: A Schottky diode comprises: a semiconductor layer and a three-terminal port located on a side of the semiconductor layer; the three-terminal port comprises a first electrode, a second electrode, and a third electrode located between the first electrode and the second electrode, at least a part of the second electrode extends into the semiconductor layer and forms a Schottky contact with the semiconductor layer, the second electrode and the third electrode are electrically connected to form an anode of the Schottky diode, and the first electrode is in ohmic contact with the semiconductor layer as a cathode of the Schottky diode; when the Schottky diode is subjected to a reverse bias voltage, a depletion layer is formed under the third electrode.

公开(公告)号：US20180138305A1

公开(公告)日：2018-05-17

申请号：US15412653

申请日：2017-01-23

Applicant: Gpower Semiconductor, Inc.

Inventor： Guangmin DENG ,  Yi PEI

IPC: H01L29/778 ,  H01L29/66 ,  H01L29/423 ,  H01L29/51 ,  H01L21/02 ,  H01L29/20

CPC classification number: H01L29/66462 ,  H01L29/2003 ,  H01L29/41766 ,  H01L29/4236 ,  H01L29/513 ,  H01L29/7786

Abstract: A semiconductor device comprises: a substrate; a semiconductor layer on the substrate; and a gallium nitride cap layer on the semiconductor layer. The gallium nitride cap layer has a thickness of 3 nm to 5.8 nm.

公开(公告)号：US20170194471A1

公开(公告)日：2017-07-06

申请号：US15462319

申请日：2017-03-17

Applicant: Gpower Semiconductor, Inc.

Inventor： Yi PEI

IPC: H01L29/778 ,  H01L29/47 ,  H01L29/66 ,  H01L29/06

CPC classification number: H01L29/7786 ,  H01L29/0607 ,  H01L29/0611 ,  H01L29/0657 ,  H01L29/2003 ,  H01L29/404 ,  H01L29/47 ,  H01L29/66462

Abstract: The embodiments of the present invention disclose a high electron mobility transistor, comprising: a substrate; a channel layer located on the substrate; a barrier layer located on the channel layer; a source electrode, a drain electrode, and a schottky gate electrode located between the source electrode and the drain electrode, all located on the barrier layer; and at least one semiconductor field ring located on the barrier layer and between the schottky gate electrode and the drain electrode. In the embodiments of the present invention, a concentration of two-dimensional electron gas at an interface between a barrier layer and a channel layer can be adjusted. Therefore, the concentration effect of the electric field at an edge of a gate is effectively improved, and the breakdown voltage of high electron mobility transistors is increased.

公开(公告)号：US20230396185A1

公开(公告)日：2023-12-07

申请号：US18250906

申请日：2021-10-28

Applicant: GPOWER SEMICONDUCTOR, INC.

Inventor： Mao HU ,  Yi PEI

IPC: H02M7/483 ,  H02M7/5387 ,  H02M1/44

CPC classification number: H02M7/4833 ,  H02M1/44 ,  H02M7/53871

Abstract: The present disclosure discloses a dual output energy conversion device, modulation method, and power supply device which can enhance the bus voltage boosting capability of the conversion device by using a first electric energy storage module, so that it can be used in a wider input voltage range. A first conversion output circuit and a second conversion output circuit are set, and voltage stress of all switching tubes is reduced to half of the direct current bus voltage, which can greatly reduce the system EMI of the conversion device in high-frequency applications, and improve the power conversion efficiency of the device. The dual output energy conversion device only needs to realize the control of one-stage power conversion, and has a simple control structure.

公开(公告)号：US20220285565A1

公开(公告)日：2022-09-08

申请号：US17632697

申请日：2020-08-05

Applicant: GPOWER SEMICONDUCTOR, INC.

Inventor： Guangmin DENG ,  Yi PEI

IPC: H01L29/872 ,  H01L29/06 ,  H01L29/40 ,  H01L29/66 ,  H01L29/417

Abstract: The present disclosure discloses a semiconductor device and a method for preparing the same. The semiconductor device includes a substrate, a doped epitaxial layer located on one side of the substrate, a channel layer located on one side of the doped epitaxial layer away from the substrate, a potential barrier layer located on one side of the channel layer away from the doped epitaxial layer, and a first electrode and a second electrode located on one side of the potential barrier layer away from the channel layer, wherein the first electrode penetrates the potential barrier layer, the channel layer and part of the doped epitaxial layer, the first electrode forms a Schottky contact with the channel layer, and a resistance of the part of the doped epitaxial layer in contact with the first electrode is greater than a resistance of the channel layer.

公开(公告)号：US20170287811A1

公开(公告)日：2017-10-05

申请号：US15478200

申请日：2017-04-03

Applicant: Gpower Semiconductor, Inc.

Inventor： Yi PEI ,  Mengjie ZHOU

IPC: H01L23/373 ,  H01L29/78

CPC classification number: H01L23/3738 ,  H01L23/291 ,  H01L29/2003 ,  H01L29/4175 ,  H01L29/41758 ,  H01L29/7786 ,  H01L29/78

Abstract: A semiconductor device comprises: a substrate; a multi-layer semiconductor layer located on the substrate, the multi-layer semiconductor layer being divided into an active area and a passive area outside the active area; a gate electrode, a source electrode and a drain electrode all located on the multi-layer semiconductor layer and within the active area; and a heat dissipation layer covering at least one portion of the active area and containing a heat dissipation material. In embodiments of the present invention, a heat dissipation layer covering at least one portion of the active area is provided in the semiconductor device. The arrangement of the heat dissipation layer adds a heat dissipation approach for the semiconductor device in the planar direction, thus the heat dissipation effect of the semiconductor device is improved.