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公开(公告)号:US11789218B2
公开(公告)日:2023-10-17
申请号:US17731868
申请日:2022-04-28
发明人: Yichen Shen , Samuel Jiang , Shanshan Yu
IPC分类号: G02B6/42 , H01S5/0234 , H01S5/02218 , G02B6/293 , H01L25/16 , H01L23/00
CPC分类号: G02B6/4215 , G02B6/29304 , G02B6/424 , G02B6/4239 , H01L24/05 , H01L24/13 , H01L24/16 , H01L24/17 , H01L24/81 , H01L25/167 , H01S5/0234 , H01S5/02218 , H01L2224/0557 , H01L2224/13025 , H01L2224/16145 , H01L2224/16227 , H01L2224/17181 , H01L2224/81986
摘要: The present disclosure provides a three-dimensional packaging method and a three-dimensional package structure of a photonic-electronic chip. The method includes: fixing an electronic chip on a first area of a first surface of a photonic chip; fixing a dummy chip on a second area of the first surface of the photonic chip, wherein the photonic chip is provided with an optical coupling interface at the second area, and the dummy chip has a cavity with a single-sided opening, and the opening of the cavity faces and covers an optical coupling interface.
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公开(公告)号:US20220384409A1
公开(公告)日:2022-12-01
申请号:US17826791
申请日:2022-05-27
发明人: Bo PENG , Huaiyu MENG , Yichen SHEN
摘要: The present invention relates to the field of photonic integrated circuits and provides a semiconductor device and a manufacturing method thereof. The semiconductor device includes an EIC chip and a PIC chip arranged on a substrate, the EIC chip is located between the PIC chip and the substrate. In embodiments, at least one EIC chip is disposed on a surface of a single PIC chip facing the substrate, and the EIC chip is mounted on the substrate through a connection structure. Therefore, the wiring of the PIC chip in the semiconductor device of the present invention is optimized such that the voltage drop due to long wiring distance can be suppressed, and the package structure of the semiconductor device is also optimized.
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公开(公告)号:US20220365295A1
公开(公告)日:2022-11-17
申请号:US17731868
申请日:2022-04-28
发明人: Samuel Jiang , Yichen Shen
IPC分类号: G02B6/42 , H01L25/16 , H01L23/00 , G02B6/293 , H01S5/0234 , H01S5/02218
摘要: The present disclosure provides a three-dimensional packaging method and a three-dimensional package structure of a photonic-electronic chip. The method includes: fixing an electronic chip on a first area of a first surface of a photonic chip; fixing a dummy chip on a second area of the first surface of the photonic chip, wherein the photonic chip is provided with an optical coupling interface at the second area, and the dummy chip has a cavity with a single-sided opening, and the opening of the cavity faces and covers an optical coupling interface.
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