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公开(公告)号：US09400516B2
公开(公告)日：2016-07-26
申请号：US14248827
申请日：2014-04-09
发明人： Wei-Chung Cheng , Shih-Hsin Hsu , Lun-Kai Chang
IPC分类号： H03K19/094 , G05F3/08 , H03K19/0185
CPC分类号： G05F3/08 , H03K19/018514
摘要： A voltage converting device includes first and second stage circuits for converting a differential voltage to an output signal that has a magnitude smaller than the differential voltage. The second stage circuit includes input transistors for receiving voltages from the first stage circuit, output transistors for outputting the output signal, and a clamp module to clamp voltages at the input transistors of the second stage circuit.
摘要翻译： 电压转换装置包括用于将差分电压转换为具有小于差分电压的幅度的输出信号的第一和第二级电路。 第二级电路包括用于接收来自第一级电路的电压的输入晶体管，用于输出输出信号的输出晶体管和用于钳位在第二级电路的输入晶体管处的电压的钳位模块。
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2.发明授权Panel driving device having a source driving circuit, and liquid crystal display apparatus having the same 有权具有源极驱动电路的面板驱动装置和具有该驱动电路的液晶显示装置公开(公告)号：US08890787B2
公开(公告)日：2014-11-18
申请号：US13740068
申请日：2013-01-11
发明人： Chih-Kang Cheng , Sung-Yau Yeh , Chih-Kang Deng
IPC分类号： G09G3/36
CPC分类号： G09G3/3648 , G09G3/3688 , G09G2320/0252
摘要： A liquid crystal display (LCD) apparatus includes: multiple differential amplifier stages each of which is operable to generate, according to a bias current and an input voltage, an output voltage having a magnitude and a slew rate that correspond respectively to the input voltage and a magnitude of the bias current, and serving as a data voltage of a corresponding pixel unit of an LCD panel; multiple current sources controllable to generate and provide a plurality of the bias currents to the differential amplifier stages, respectively; and a bias voltage generating unit connected electrically to the current sources in a current mirror configuration for generating an input bias current and controlling the current sources to generate the bias currents according to a latch pulse signal. The slew rate of the output voltage corresponds to a logic state of the input bias current.
摘要翻译： 液晶显示器（LCD）装置包括：多个差分放大器级，每个差分放大器级可以根据偏置电流和输入电压产生具有分别对应于输入电压的幅度和转换速率的输出电压，以及 偏置电流的大小，并且用作LCD面板的相应像素单元的数据电压; 多个电流源可分别产生并提供多个偏置电流到差分放大器级; 以及偏置电压产生单元，以电流镜配置电流连接，用于产生输入偏置电流，并根据锁存脉冲信号控制电流源产生偏置电流。 输出电压的转换速率对应于输入偏置电流的逻辑状态。
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3.发明申请SWITCH CONTROL CIRCUIT, SINGLE-INDUCTOR-DUAL-OUTPUT (SIDO) CONTROL METHOD AND SINGLE-INDUCTOR-DUAL-OUTPUT (SIDO) CONVERTER APPLYING THE SAME 有权开关控制电路，单电源 - 双输出（SIDO）控制方法和单电源 - 双输出（SIDO）转换器公开(公告)号：US20140239720A1
公开(公告)日：2014-08-28
申请号：US14190624
申请日：2014-02-26
IPC分类号： H02M3/158
CPC分类号： H02M3/1582 , H02M2001/009 , Y10T307/406
摘要： A switch control circuit includes a processor computing an on-time ratio based on an input voltage value, a first output voltage value, and a second output voltage value. The processor further computes an on-time sum based, on an output current value, an inductance value, the input voltage value, the first-output voltage value and the second output voltage value, and further computes an operation frequency value that corresponds to the on-time sum. The processor further computes on-time values of a boost mode and a buck-boost mode based on the on-time sum and the on-time ratio. The processor controls a signal generator based on the operation frequency value, the on-time value of the boost mode and the on-time value of the buck-boost mode.
摘要翻译： 开关控制电路包括处理器，其基于输入电压值，第一输出电压值和第二输出电压值来计算导通时间比。 处理器还基于输出电流值，电感值，输入电压值，第一输出电压值和第二输出电压值来计算导通时间总和，并且还计算对应于 准时金额 处理器还基于导通时间和导通时间比计算升压模式和降压 - 升压模式的导通时间值。 处理器基于操作频率值，升压模式的导通时间值和降压 - 升压模式的导通时间值来控制信号发生器。
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4.发明授权Semiconductor device having two-way conduction characteristics, and electrostatic discharge protection circuit incorporating the same 有权具有双向导通特性的半导体器件和包括该导电特性的静电放电保护电路公开(公告)号：US08779519B1
公开(公告)日：2014-07-15
申请号：US13742527
申请日：2013-01-16
发明人： Wei-Yao Lin , Chung-Wei Wang , Yu-Lun Lu , Kuo-Ko Chen
IPC分类号： H01L23/62
CPC分类号： H01L27/0266 , H01L27/0255
摘要： A semiconductor device includes an n-type first doped region for receiving an external voltage, an n-type second doped region and a p-type third doped regions all formed in a p-type substrate, and is configured to have a first threshold voltage for forward conduction between the first and second doped regions, and a second threshold voltage for forward conduction between the first and third doped regions. A current is drained by flowing through the first doped region, the substrate and the second doped region if the external voltage is greater than the first threshold voltage or by flowing through the third doped region, the substrate and the first doped region if the external voltage is less than the second threshold voltage.
摘要翻译： 半导体器件包括用于接收外部电压的n型第一掺杂区域，全部形成在p型衬底中的n型第二掺杂区域和p型第三掺杂区域，并且被配置为具有第一阈值电压 用于第一和第二掺杂区域之间的正向传导，以及用于第一和第三掺杂区域之间的正向传导的第二阈值电压。 如果外部电压大于第一阈值电压或通过流过第三掺杂区域，衬底和第一掺杂区域，则流过第一掺杂区域，衬底和第二掺杂区域的电流被耗尽，如果外部电压 小于第二阈值电压。
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5.发明授权公开(公告)号：US08564353B2
公开(公告)日：2013-10-22
申请号：US13408285
申请日：2012-02-29
申请人： Tzu-Yuan Kuo , Tieh-Yen Chang
发明人： Tzu-Yuan Kuo , Tieh-Yen Chang
CPC分类号： H03H11/26
摘要： A temperature sensitive device includes a first delay unit generating a first delayed signal, a second delay unit generating a second delayed signal, a difference generating unit generating an indication signal according to the first delayed signal and the second delayed signal, and a processing unit generating an output signal that is dependent on the temperature sensed by the temperature sensitive device and substantially independent of the manufacturing process of the temperature sensitive device.
摘要翻译： 温度敏感装置包括产生第一延迟信号的第一延迟单元，产生第二延迟信号的第二延迟单元，根据第一延迟信号和第二延迟信号产生指示信号的差产生单元，以及产生 输出信号取决于温度敏感器件感测到的温度，并且基本上与温度敏感器件的制造过程无关。
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6.发明授权Switch control circuit, single-inductor-dual-output (SIDO) control method and single-inductor-dual-output (SIDO) converter applying the same 有权开关控制电路，单电感双输出（SIDO）控制方法和单电感双输出（SIDO）转换器公开(公告)号：US09350247B2
公开(公告)日：2016-05-24
申请号：US14190624
申请日：2014-02-26
CPC分类号： H02M3/1582 , H02M2001/009 , Y10T307/406
摘要： A switch control circuit includes a processor computing an on-time ratio based on an input voltage value, a first output voltage value, and a second output voltage value. The processor further computes an on-time sum based, on an output current value, an inductance value, the input voltage value, the first output voltage value and the second output voltage value, and further computes an operation frequency value that corresponds to the on-time sum. The processor further computes on-time values of a boost mode and a buck-boost mode based on the on-time sum and the on-time ratio. The processor controls a signal generator based on the operation frequency value, the on-time value of the boost mode and the on-time value of the buck-boost mode.
摘要翻译： 开关控制电路包括处理器，其基于输入电压值，第一输出电压值和第二输出电压值来计算导通时间比。 处理器进一步基于输出电流值，电感值，输入电压值，第一输出电压值和第二输出电压值来计算导通时间总和，并且进一步计算对应于on的运行频率值 时间总和 处理器还基于导通时间和导通时间比计算升压模式和降压 - 升压模式的导通时间值。 处理器基于操作频率值，升压模式的导通时间值和降压 - 升压模式的导通时间值来控制信号发生器。
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公开(公告)号：US08983212B2
公开(公告)日：2015-03-17
申请号：US13785581
申请日：2013-03-05
发明人： Ming-Yu Tsai , Chien-Kuo Wang , Chen-Ting Kuan
CPC分类号： G06T9/00 , H04N19/119 , H04N19/12 , H04N19/154 , H04N19/176 , H04N19/182 , H04N19/98
摘要： A method for image data compression of a to-be-encoded image block includes: determining one of a plurality of preset encoding modes as an encoding mode based upon attributes of pixels of the to-be-encoded image block; and compressing image data of the to-be-encoded image block according to the encoding mode thus determined so as to obtain encoded data.
摘要翻译： 一种待编码图像块的图像数据压缩方法包括：基于待编码图像块的像素的属性，确定多个预设编码模式之一作为编码模式; 以及根据如此确定的编码模式来压缩待编码图像块的图像数据，以获得编码数据。
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公开(公告)号：US08772981B2
公开(公告)日：2014-07-08
申请号：US12965408
申请日：2010-12-10
申请人： Chen-Jung Chuang , Chien-Kuo Wang
发明人： Chen-Jung Chuang , Chien-Kuo Wang
CPC分类号： H02B1/00 , Y10T307/675 , Y10T307/724 , Y10T307/76
摘要： A multiplexer includes: a first switch unit coupled between a first input terminal and an output terminal and including a series connection of first and second switches; a second switch unit coupled between a second input terminal and the output terminal; and a third switch unit coupled to a third input terminal and a common node between the first and second switches. Different first and second voltages, and a third voltage greater than one of the first and second voltages and less than the other one of the first and second voltage are applied respectively to the first, second and third input terminals. The multiplexer is operable between a first mode, where the first voltage is transmitted to the output terminal, and a second mode, where the second voltage is transmitted to the output terminal and the third voltage is transmitted to the common node between the first and second switches.
摘要翻译： 多路复用器包括：第一开关单元，耦合在第一输入端和输出端之间，并包括第一和第二开关的串联连接; 耦合在第二输入端子和输出端子之间的第二开关单元; 以及耦合到所述第一和第二开关之间的第三输入端和公共节点的第三开关单元。 不同的第一和第二电压以及大于第一和第二电压中的一个并且小于第一和第二电压中的另一个的第三电压分别施加到第一，第二和第三输入端子。 多路复用器可在第一模式（其中第一电压被传输到输出端子）和第二模式之间操作，其中第二电压被传输到输出端子，并且第三电压被传送到第一和第二电压之间的公共节点 开关。
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公开(公告)号：US08749418B2
公开(公告)日：2014-06-10
申请号：US13764824
申请日：2013-02-12
发明人： Sung-Yau Yeh , Chih-Kang Deng
CPC分类号： H03M1/682 , G09G3/3688 , H03F3/45179 , H03M1/66 , H03M1/68 , H03M1/745
摘要： An interpolative digital-to-analog (D/A) converter is adapted to convert a N-bit digital signal into an analog signal, where N is a positive integer greater than 1. The interpolative D/A converter includes a router unit that outputs first and second router voltages based on the first and second bits of the digital signal, and an interpolation unit that receives the first and second router voltages from the router unit, and that performs interpolation operation on the first and second router voltages according to the first bit of the digital signal, so as to generate the analog signal having a voltage magnitude ranging from the first router voltage to the second router voltage.
摘要翻译： 内插数模（D / A）转换器适于将N位数字信号转换为模拟信号，其中N是大于1的正整数。内插D / A转换器包括输出的路由器单元 基于数字信号的第一和第二位的第一和第二路由器电压，以及内插单元，其从路由器单元接收第一和第二路由器电压，并且根据第一和第二路由器电压对第一和第二路由器电压执行内插操作 以产生具有从第一路由器电压到第二路由器电压的电压幅度的模拟信号。
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公开(公告)号：US20140043178A1
公开(公告)日：2014-02-13
申请号：US13764824
申请日：2013-02-12
发明人： Sung-Yau YEH , Chih-Kang DENG
IPC分类号： H03M1/66
CPC分类号： H03M1/682 , G09G3/3688 , H03F3/45179 , H03M1/66 , H03M1/68 , H03M1/745
摘要： An interpolative digital-to-analog (D/A) converter is adapted to convert a N-bit digital signal into an analog signal, where N is a positive integer greater than 1. The interpolative D/A converter includes a router unit that outputs first and second router voltages based on the first and second bits of the digital signal, and an interpolation unit that receives the first and second router voltages from the router unit, and that performs interpolation operation on the first and second router voltages according to the first bit of the digital signal, so as to generate the analog signal having a voltage magnitude ranging from the first router voltage to the second router voltage.
摘要翻译： 内插数模（D / A）转换器适于将N位数字信号转换为模拟信号，其中N是大于1的正整数。内插D / A转换器包括输出的路由器单元 基于数字信号的第一和第二位的第一和第二路由器电压，以及内插单元，其从路由器单元接收第一和第二路由器电压，并且根据第一和第二路由器电压对第一和第二路由器电压执行内插操作 以产生具有从第一路由器电压到第二路由器电压的电压幅度的模拟信号。
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