METHOD AND APPARATUS TO DETECT AND BLOCK UNAUTHORIZED MAC ADDRESS BY VIRTUAL MACHINE AWARE NETWORK SWITCHES
    2.
    发明申请
    METHOD AND APPARATUS TO DETECT AND BLOCK UNAUTHORIZED MAC ADDRESS BY VIRTUAL MACHINE AWARE NETWORK SWITCHES 有权
    通过虚拟机识别网络切换检测和阻断未知MAC地址的方法和装置

    公开(公告)号:US20140007232A1

    公开(公告)日:2014-01-02

    申请号:US13975310

    申请日:2013-08-24

    IPC分类号: H04L29/06

    摘要: The disclosure relates to a method and apparatus for detecting and blocking unauthorized MAC addresses used by virtual machines. In one embodiment, the disclosure provides automated and consistent verification of VM traffic against values assigned to each VM by network administrator. In another embodiment, the disclosure provides for validating a newly discovered VM by comparing its attributes with the corresponding description of the known VMs stored at a database. A re-validation check may also be implemented. If the VM is validated, the VM will be processed according to network policy to support features including VMReady. If the VM fails validation, other actions can be taken.

    摘要翻译: 本公开涉及一种用于检测和阻止虚拟机使用的未授权MAC地址的方法和装置。 在一个实施例中,本公开提供了VM流量对网络管理员分配给每个VM的值的自动化和一致性验证。 在另一个实施例中,本公开提供通过将其属性与存储在数据库中的已知VM的相应描述进行比较来验证新发现的VM。 还可以实施重新验证检查。 如果VM被验证,VM将根据网络策略进行处理,以支持VMReady等功能。 如果VM验证失败,可以采取其他措施。

    Method to control source/drain stressor profiles for stress engineering
    3.
    发明授权
    Method to control source/drain stressor profiles for stress engineering 有权
    控制应力工程源/排泄应力曲线的方法

    公开(公告)号:US08450775B2

    公开(公告)日:2013-05-28

    申请号:US13229773

    申请日:2011-09-12

    IPC分类号: H01L21/02

    摘要: An example embodiment of a strained channel transistor structure comprises the following: a strained channel region comprising a first semiconductor material with a first natural lattice constant; a gate dielectric layer overlying the strained channel region; a gate electrode overlying the gate dielectric layer; and a source region and drain region oppositely adjacent to the strained channel region, one or both of the source region and drain region are comprised of a stressor region comprised of a second semiconductor material with a second natural lattice constant different from the first natural lattice constant; the stressor region has a graded concentration of a dopant impurity and/or of a stress inducing molecule. Another example embodiment is a process to form the graded impurity or stress inducing molecule stressor embedded S/D region, whereby the location/profile of the S/D stressor is not defined by the recess depth/profile.

    摘要翻译: 应变通道晶体管结构的示例性实施例包括以下:包含具有第一自然晶格常数的第一半导体材料的应变通道区域; 覆盖在应变通道区上的栅介质层; 覆盖所述栅介质层的栅电极; 以及源极区域和漏极区域,其与所述应变通道区域相邻地邻近,所述源极区域和漏极区域中的一个或两个由包含第二半导体材料的应力区域构成,所述第二半导体材料具有不同于所述第一自然晶格常数的第二自然晶格常数 ; 应力区域具有掺杂剂杂质和/或应力诱导分子的分级浓度。 另一个示例性实施例是形成渐变杂质或应力诱导分子应力嵌入S / D区域的过程,由此S / D应力器的位置/轮廓不由凹槽深度/轮廓限定。

    Method and system for controlling radical distribution
    4.
    发明授权
    Method and system for controlling radical distribution 有权
    控制激进分布的方法和系统

    公开(公告)号:US08038834B2

    公开(公告)日:2011-10-18

    申请号:US12754662

    申请日:2010-04-06

    摘要: A plasma processing system includes a processing chamber, a substrate holder configured to hold a substrate for plasma processing, and a gas injection assembly. The gas injection assembly includes a first evacuation port located substantially in a center of the gas injection assembly and configured to evacuate gases from a central region of the substrate, and a gas injection system configured to inject gases in the process chamber. The plasma processing system also includes a second evacuation port configured to evacuate gases from a peripheral region surrounding the central region of the substrate.

    摘要翻译: 等离子体处理系统包括处理室,被配置为保持用于等离子体处理的基板的基板保持器和气体注入组件。 气体注入组件包括基本上位于气体注入组件的中心并且构造成从衬底的中心区域排出气体的第一排气口,以及构造成在处理室中注入气体的气体注入系统。 等离子体处理系统还包括构造成从围绕衬底的中心区域的周边区域排出气体的第二排气口。

    Formation of raised source/drain structures in NFET with embedded SiGe in PFET
    7.
    发明授权
    Formation of raised source/drain structures in NFET with embedded SiGe in PFET 有权
    在PFET中嵌入SiGe的NFET中形成凸起的源极/漏极结构

    公开(公告)号:US07718500B2

    公开(公告)日:2010-05-18

    申请号:US11305584

    申请日:2005-12-16

    IPC分类号: H01L21/336

    摘要: A structure and method for forming raised source/drain structures in a NFET device and embedded SiGe source/drains in a PFET device. We provide a NFET gate structure over a NFET region in a substrate and PFET gate structure over a PFET region. We provide NFET SDE regions adjacent to the NFET gate and provide PFET SDE regions adjacent to the PFET gate. We form recesses in the PFET region in the substrate adjacent to the PFET second spacers. We form a PFET embedded source/drain stressor in the recesses. We form a NFET S/D epitaxial Si layer over the NFET SDE regions and a PFET S/D epitaxial Si layer over PFET embedded source/drain stressor. The epitaxial Si layer over PFET embedded source/drain stressor is consumed in a subsequent salicide step to form a stable and low resistivity silicide over the PFET embedded source/drain stressor. We perform a NFET S/D implant by implanting N-type ions into NFET region adjacent to the NFET gate structure and into the NFET S/D stressor Si layer to form the raised NFET source/drains.

    摘要翻译: 用于在NFET器件中形成凸起的源极/漏极结构并在PFET器件中形成嵌入的SiGe源极/漏极的结构和方法。 我们在衬底上的NFET区域和PFET区域上的PFET栅极结构提供NFET栅极结构。 我们提供与NFET栅极相邻的NFET SDE区域,并提供与PFET栅极相邻的PFET SDE区域。 我们在邻近PFET第二间隔物的衬底中的PFET区域中形成凹陷。 我们在凹槽中形成PFET嵌入式源极/漏极应力器。 我们在NFET SDE区域上形成NFET S / D外延Si层,并在PFET嵌入式源极/漏极应力器上形成PFET S / D外延Si层。 在随后的自对准硅化物步骤中,在PFET嵌入式源极/漏极应力源上的外延Si层被消耗,以在PFET嵌入式源极/漏极应力器上形成稳定和低电阻率的硅化物。 我们通过将N型离子注入到与NFET栅极结构相邻的NFET区域中并进入NFET S / D应力Si层来形成NFET S / D注入,以形成升高的NFET源极/漏极。

    METHOD FOR REPORTING THE STATUS AND DRILL-DOWN OF A CONTROL APPLICATION IN AN AUTOMATED MANUFACTURING ENVIRONMENT
    8.
    发明申请
    METHOD FOR REPORTING THE STATUS AND DRILL-DOWN OF A CONTROL APPLICATION IN AN AUTOMATED MANUFACTURING ENVIRONMENT 失效
    报告自动化制造环境中控制应用的状态和下降的方法

    公开(公告)号:US20090048701A1

    公开(公告)日:2009-02-19

    申请号:US11839796

    申请日:2007-08-16

    IPC分类号: G06F19/00

    CPC分类号: G05B23/0278

    摘要: Disclosed are embodiments that provide near real-time monitoring of a control application in a manufacturing environment to detect and determine the root cause of faults within the control application. The embodiments monitor the flow of data within the control application during events (i.e., transactions, stages, process steps, etc.). By comparing a dataflow path for a near real-time event with historical dataflow path records, dataflow interruptions (i.e., fails) within the control application can be detected. By determining the location of such a dataflow interruption, the root cause of the control application fail can be determined. Additionally, the invention can generate summary reports indicating the status of the control application. For example, the summary reports can quantify the performance and/or the effectiveness of the control application. These summary reports can further be generated with drill downs to provide a user with direct access to the records upon which the reports were based.

    摘要翻译: 公开了提供对制造环境中的控制应用的近实时监控以检测和确定控制应用内的故障的根本原因的实施例。 这些实施例在事件(即事务,阶段,处理步骤等)期间监视控制应用程序内的数据流。 通过将近实时事件的数据流路径与历史数据流路径记录进行比较,可以检测到控制应用程序内的数据流中断(即,失败)。 通过确定这种数据流中断的位置,可以确定控制应用程序失败的根本原因。 此外,本发明可以生成指示控制应用的状态的汇总报告。 例如,总结报告可以量化控制应用程序的性能和/或有效性。 这些摘要报告可以进一步通过深入研究生成,以向用户提供对报告所基于的记录的直接访问。

    GENERATING A FINGERPRINT OF A BIT SEQUENCE
    9.
    发明申请
    GENERATING A FINGERPRINT OF A BIT SEQUENCE 有权
    产生位数序列的指纹

    公开(公告)号:US20090030994A1

    公开(公告)日:2009-01-29

    申请号:US12119842

    申请日:2008-05-13

    申请人: Mark Usher

    发明人: Mark Usher

    IPC分类号: G06F15/16

    CPC分类号: H04L51/12

    摘要: A method of generating a fingerprint of a bit sequence includes determining a relative occurrence frequency of each bit combination of a set of bit combinations in the bit sequence, wherein the set of bit combinations comprises all possible non-redundant sub-sequences of bits having at least one bit and at most a preset maximal number of bits. The method further includes determining for each bit combination of the set of bit combinations a difference value between the relative occurrence frequency of the bit combination and a random occurrence frequency, the random occurrence frequency relating to the expected random occurrence of the bit combination in the bit sequence. Moreover, the method includes allocating a set of bins, each bin of the set of bins being associated with a predetermined interval of difference values, each bin further relating to a bin value. The difference value of each bit combination is assigned to the bin which is associated with the interval of difference values in which the difference value of the corresponding bit combination lies. A fingerprint of the bit sequence is generated by use of the bin values of the bins to which a difference value has been assigned.

    摘要翻译: 一种生成比特序列的指纹的方法包括确定比特序列中的一组比特组合的每个比特组合的相对出现频率,其中所述比特组合包括所有可能的非冗余子序列, 至少一位,最多一个预设的最大位数。 该方法还包括:确定位组合的每个比特组合,比特组合的相对出现频率和随机出现频率之间的差值,与该比特中的比特组合的预期随机出现相关的随机出现频率 序列。 此外,该方法包括分配一组箱体,该组箱的每个箱体与预定的差值区间相关联,每个箱体进一步与箱体值相关联。 每个位组合的差分值被分配给与相应位组合的差值所在的差分值的间隔相关联的仓。 通过使用已经分配了差值的箱的箱体值来生成位序列的指纹。

    SYSTEM FOR REPLYING TO RELATED MESSAGES
    10.
    发明申请
    SYSTEM FOR REPLYING TO RELATED MESSAGES 有权
    回复相关信息的系统

    公开(公告)号:US20080295001A1

    公开(公告)日:2008-11-27

    申请号:US12166487

    申请日:2008-07-02

    IPC分类号: G06F3/048

    摘要: A system is provided which utilizes a threading service to offer enhanced features for a document management system including an email system. Various enhanced email features may be provided through one or more of the following components: a delete module, a reply module, a profile module, and a search module. The delete module enables a user to delete a selected message, a set of related messages, or the whole set except for the selected message. The reply module enables a user to send a reply message to all addresses associated and involved with an entire set of related messages. The profile module enables a dynamic interest profile to contain all relevant information from an outgoing message and a set of messages related to the outgoing message. The search module enables search results to include documents which match the user's query as well as documents related to the documents which match the user's query.

    摘要翻译: 提供一种利用线程服务为包括电子邮件系统的文档管理系统提供增强功能的系统。 可以通过一个或多个以下组件来提供各种增强的电子邮件功能:删除模块,回复模块,配置文件模块和搜索模块。 删除模块使得用户能够删除所选择的消息,一组相关消息或除了所选消息之外的整个集合。 回复模块使得用户能够向与所有相关消息相关联并涉及的所有地址发送回复消息。 配置文件模块使得动态兴趣配置文件能够包含来自传出消息的所有相关信息和与传出消息相关的一组消息。 搜索模块使搜索结果能够包含与用户查询匹配的文档以及与用户查询匹配的文档相关的文档。