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公开(公告)号：US07813893B2
公开(公告)日：2010-10-12
申请号：US11655024
申请日：2007-01-18
申请人： Kien Hoong Fong , Wei Fu , Jun Shi
发明人： Kien Hoong Fong , Wei Fu , Jun Shi
IPC分类号： G05B13/04
CPC分类号： G05B13/048
摘要： A method that involves matching the trend of process outcome with the trend of process variables to identify the variables that have an impact on the process outcome is disclosed. The method for process trend matching comprises processing of raw data of process outcome and of process variables using an outlier filtering method, smoothing these data using common smoothing algorithm like Kernel, dividing smoothed raw data equally into time intervals, computing the gradients of the points at both ends of the time intervals, and translating the gradients into a scale based on the magnitude of the gradients. The following steps comprise comparing the process outcome and each process variable independently for same time frame, and assigning a score for both outcome and variable. The sum of the scores is then computed which is used to determine the quality of fit. A real-time monitoring system is then set up to monitor these variables for any drifts. When a drift is detected, troubleshooting activity will be triggered and actions taken to resolve the drift, after which monitoring of the variable will be restarted.
摘要翻译： 公开了一种将过程结果趋势与过程变量趋势相匹配的方法，以确定对过程结果有影响的变量。 过程趋势匹配的方法包括使用异常值滤波方法处理过程结果的原始数据和过程变量，使用常规的平滑算法（如内核）平滑这些数据，将平滑的原始数据平均分为时间间隔，计算点的梯度 时间间隔的两端，并且基于梯度的幅度将梯度转换成刻度。 以下步骤包括在相同时间框架下独立地比较过程结果和每个过程变量，并为结果和变量分配分数。 然后计算得分的总和，其用于确定拟合质量。 然后建立一个实时监控系统来监测任何漂移的这些变量。 当检测到漂移时，将触发故障排除活动，并采取措施来解决漂移，然后重新启动对变量的监视。
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公开(公告)号：US07750819B2
公开(公告)日：2010-07-06
申请号：US12080893
申请日：2008-04-07
申请人： Khoon Peng Lim
发明人： Khoon Peng Lim
IPC分类号： G08B21/00
CPC分类号： G01M7/025
摘要： Methods and systems for detecting wafer shift/slide in a semiconductor process chamber have been disclosed. The vibration amplitude is measured in terms of acceleration because an increase in vibrational acceleration correlates with an increase of displacement of a wafer. The vibration of a chamber is measured. External vibratory forces acting on the chamber may be transmitted to the wafer inside the chamber. The methods/systems determine if there is a net resultant force that may cause an unconstrained wafer to move from its original position in a chamber by measuring the relative chamber vibrations in three orthogonal directions. A tri-axial or three uni-axial accelerometers are mounted on a preferably exterior wall of the chamber to measure its vibration amplitude. The signal obtained as a function of time is then compared against a predetermined alarm amplitude to provide notification for corrective action.
摘要翻译： 已经公开了用于检测半导体处理室中的晶片移位/滑动的方法和系统。 由于振动加速度的增加与晶片的位移增大有关，因此以加速度来测量振动幅度。 测量室的振动。 作用在室上的外部振动力可以传递到室内的晶片。 方法/系统确定是否存在可能通过测量三个正交方向上的相对室振动而导致无约束晶片从其原始位置移动到室中的净合力。 三轴或三个单向加速度计安装在室的优选外壁上以测量其振幅。 然后将作为时间的函数获得的信号与预定的报警幅度进行比较，以提供纠正措施的通知。
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公开(公告)号：US20080201003A1
公开(公告)日：2008-08-21
申请号：US11708391
申请日：2007-02-20
IPC分类号： G06F19/00
CPC分类号： G05B19/41865 , G05B2219/32266 , G05B2219/32267 , G05B2219/45031
摘要： Methods and systems for reticle scheduling in semiconductor manufacturing providing a trade-off between complying with level priority and maximizing scanner utilization for critical scanners as a whole is disclosed. The extent of trade-off is specified by user, depending on scanner excess capacity. The method invented comprises, first, the steps of an initialization block performing splitting planning horizon into time buckets, initialization of system variables, and reading data on work-in-process, scanner/reticle status and reticle locations. The following block determines which buckets to run optimization for. The next method block is building a network for optimization based on inputs from inline real-time dispatching (RTD) followed by running optimization of the network. The last method block updates WIP and reticle information based on optimization results and feeds the results into a wafer lot assignment system.
摘要翻译： 公开了用于半导体制造中的掩模版调度的方法和系统，其提供了在满足关键扫描仪整体上的优先级和最大化扫描仪利用率之间的权衡。 权衡的范围由用户指定，具体取决于扫描仪的过剩容量。 所发明的方法包括：首先，将初始化块执行到时间段中的分割计划水平面，系统变量的初始化以及在处理中的读取数据，扫描仪/掩模版状态和掩模版位置的步骤。 以下块确定要为哪个存储区运行优化。 下一个方法块是基于来自在线实时调度（RTD）的输入来构建网络进行优化，然后运行网络优化。 最后的方法块基于优化结果更新WIP和标线信息，并将结果馈送到晶片批次分配系统。
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公开(公告)号：US07407871B2
公开(公告)日：2008-08-05
申请号：US11515534
申请日：2006-09-05
IPC分类号： H01L21/322
CPC分类号： H01L21/26513 , H01L27/10873
摘要： A process for fabricating an MOS device specifically a DRAM device, featuring passivation of defects in regions of a semiconductor substrate wherein defects left unpassivated can deleteriously influence data retention time, has been developed. A high density plasma dry etching procedure used to define the DRAM conductive gate electrode can create unwanted defects in a region near the surface of uncovered portions of the semiconductor substrate during the high density plasma procedure over etch cycle. Implantation of a group V element such as arsenic can be used to passivate the unwanted plasma etch defects, thus reducing the risk of defect related device leakage phenomena. However to insure the group V implanted species remain at or near the semiconductor surface for optimum defect passivation, the group V element implantation procedure is performed after all high temperature DRAM fabrication steps, such as selective oxidation for creation of oxide spacers on the sides of the conductive gate electrode, have been completed. A slow diffusing implanted arsenic ion is the optimum candidate for passivation while faster diffusing group V elements such as phosphorous are not as attractive for defect passivation.
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公开(公告)号：US20080124814A1
公开(公告)日：2008-05-29
申请号：US11515534
申请日：2006-09-05
IPC分类号： H01L21/02
CPC分类号： H01L21/26513 , H01L27/10873
摘要： A process for fabricating an MOS device specifically a DRAM device, featuring passivation of defects in regions of a semiconductor substrate wherein defects left unpassivated can deleteriously influence data retention time, has been developed. A high density plasma dry etching procedure used to define the DRAM conductive gate electrode can create unwanted defects in a region near the surface of uncovered portions of the semiconductor substrate during the high density plasma procedure over etch cycle. Implantation of a group V element such as arsenic can be used to passivate the unwanted plasma etch defects, thus reducing the risk of defect related device leakage phenomena. However to insure the group V implanted species remain at or near the semiconductor surface for optimum defect passivation, the group V element implantation procedure is performed after all high temperature DRAM fabrication steps, such as selective oxidation for creation of oxide spacers on the sides of the conductive gate electrode, have been completed. A slow diffusing implanted arsenic ion is the optimum candidate for passivation while faster diffusing group V elements such as phosphorous are not as attractive for defect passivation.
摘要翻译： 已经开发了制造具有DRAM器件的MOS器件的工艺，其特征在于半导体衬底的区域中的缺陷钝化，其中缺陷未被激活可以有害地影响数据保留时间。 用于限定DRAM导电栅电极的高密度等离子体干蚀刻方法可以在蚀刻周期的高密度等离子体工艺期间在半导体衬底的未覆盖部分的表面附近的区域中产生不想要的缺陷。 可以使用诸如砷的V族元素的植入来钝化不需要的等离子体蚀刻缺陷，从而降低与缺陷相关的器件泄漏现象的风险。 然而，为了确保V族植入物质保留在半导体表面处或附近，以获得最佳缺陷钝化，在所有高温DRAM制造步骤之后执行V族元素注入程序，例如用于在 导电栅电极，已经完成。 缓慢扩散的注入砷离子是钝化的最佳候选物，而较快扩散V族元素（如磷）对缺陷钝化不具有吸引力。
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6.发明授权公开(公告)号：US07363098B2
公开(公告)日：2008-04-22
申请号：US11311120
申请日：2005-12-19
申请人： Choy Yow Ng , Ying Li Fan
发明人： Choy Yow Ng , Ying Li Fan
IPC分类号： G06F19/00
CPC分类号： G05B19/41875 , G05B2219/32222 , G05B2219/45031 , Y02P90/22
摘要： The present invention discloses a method that recognizes and uses the grouping patterns of process material by different machines at different process steps to identify potential problem machines causing the excursion in semiconductor manufacturing. The excursion could be a yield problem at the final test or at any inline electrical testing, metrology measurement, or inspection at different process steps. The potential problematic machines are listed in order of most likely to be problematic.
摘要翻译： 本发明公开了一种在不同工艺步骤中识别和使用不同机器的处理材料的分组图案的方法，以识别导致半导体制造中的偏移的潜在问题机器。 在最终测试或任何在线电气测试，计量测量或不同工艺步骤的检查时，偏移可能是产量问题。 潜在的问题机器按照最有可能出现问题的顺序列出。
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公开(公告)号：US07163435B2
公开(公告)日：2007-01-16
申请号：US11047117
申请日：2005-01-31
申请人： Khoon Peng Lim , Kok Eng Lee
发明人： Khoon Peng Lim , Kok Eng Lee
CPC分类号： B24B53/017 , B24B49/003
摘要： CMP pad conditioning processes have been monitored and controlled by detecting the vibrational spectrum of a sensor mounted on the conditioner support arm. An accelerometer is used as the detector so that vibrational velocity (which correlates with pad wear) can be measured, rather than displacement or acceleration. After the vibrational spectrum has been transformed to its frequency domain equivalent, it is monitored for the presence of abnormal peaks in order to control the conditioning process.
摘要翻译： 已经通过检测安装在调节器支撑臂上的传感器的振动谱来监测和控制CMP垫调节过程。 使用加速度计作为检测器，从而可以测量振动速度（与焊盘磨损相关），而不是位移或加速度。 在将振动谱转换为其频域等效物之后，监测异常峰的存在以控制调节过程。
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公开(公告)号：US20060172662A1
公开(公告)日：2006-08-03
申请号：US11047117
申请日：2005-01-31
CPC分类号： B24B53/017 , B24B49/003
摘要： CMP pad conditioning processes have been monitored and controlled by detecting the vibrational spectrum of a sensor mounted on the conditioner support arm. An accelerometer is used as the detector so that vibrational velocity (which correlates with pad wear) can be measured, rather than displacement or acceleration. After the vibrational spectrum has been transformed to its frequency domain equivalent, it is monitored for the presence of abnormal peaks in order to control the conditioning process.
摘要翻译： 已经通过检测安装在调节器支撑臂上的传感器的振动谱来监测和控制CMP垫调节过程。 使用加速度计作为检测器，从而可以测量振动速度（与焊盘磨损相关），而不是位移或加速度。 在将振动谱转换为其频域等效物之后，监测异常峰的存在以控制调节过程。
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公开(公告)号：US20060106921A1
公开(公告)日：2006-05-18
申请号：US10988805
申请日：2004-11-15
IPC分类号： G06F15/177 , G06F15/173 , G06F15/16
CPC分类号： G05B19/41865 , Y02P90/20
摘要： The present invention discloses a new data collection method employed by a middle layer between the host and the equipment, which improves the speed and consistency of data collection. The middle layer incorporated with the proposed data collection method functions as a data format converter as well as a data processor/classifier, which helps to filter and format messages before delivering data to the host or equipment. The proposed data collection method enables the middle layer to perform local reply, local data sampling, and group data polling, thus relieving processing resources of both the equipment and the host. This allows implementation of APC on older wafer fabrication processes using old equipment.
摘要翻译： 本发明公开了一种由主机与设备之间的中间层采用的新数据采集方式，提高了数据采集的速度和一致性。 与提出的数据收集方法结合的中间层作为数据格式转换器以及数据处理器/分类器起作用，其在向主机或设备传送数据之前有助于过滤和格式化消息。 所提出的数据采集方法使得中间层能够执行本地应答，本地数据采样和组数据轮询，从而减轻了设备和主机的处理资源。 这允许使用旧设备在旧的晶圆制造工艺上实现APC。
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公开(公告)号：US20090249880A1
公开(公告)日：2009-10-08
申请号：US12080893
申请日：2008-04-07
申请人： Khoon Peng Lim
发明人： Khoon Peng Lim
IPC分类号： G01M7/02
CPC分类号： G01M7/025
摘要： Methods and systems for detecting wafer shift/slide in a semiconductor process chamber have been disclosed. The vibration amplitude is measured in terms of acceleration because an increase in vibrational acceleration correlates with an increase of displacement of a wafer. The vibration of a chamber is measured. External vibratory forces acting on the chamber may be transmitted to the wafer inside the chamber. The methods/systems determine if there is a net resultant force that may cause an unconstrained wafer to move from its original position in a chamber by measuring the relative chamber vibrations in three orthogonal directions. A tri-axial or three uni-axial accelerometers are mounted on a preferably exterior wall of the chamber to measure its vibration amplitude. The signal obtained as a function of time is then compared against a predetermined alarm amplitude to provide notification for corrective action.
摘要翻译： 已经公开了用于检测半导体处理室中的晶片移位/滑动的方法和系统。 由于振动加速度的增加与晶片的位移增大有关，因此以加速度来测量振动幅度。 测量室的振动。 作用在室上的外部振动力可以传递到室内的晶片。 方法/系统确定是否存在可能通过测量三个正交方向上的相对室振动而导致无约束晶片从其原始位置移动到室中的净合力。 三轴或三个单向加速度计安装在室的优选外壁上以测量其振幅。 然后将作为时间的函数获得的信号与预定的报警幅度进行比较，以提供纠正措施的通知。
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