摘要:
A data processing apparatus and method are provided for performing rearrangement operations. The data processing apparatus has a register data store with a plurality of registers, each register storing a plurality of data elements. Processing circuitry is responsive to control signals to perform processing operations on the data elements. An instruction decoder is responsive to at least one but no more than N rearrangement instructions, where N is an odd plural number, to generate control signals to control the processing circuitry to perform a rearrangement process at least equivalent to: obtaining as source data elements the data elements stored in N registers of said register data store as identified by the at least one re-arrangement instruction; performing a rearrangement operation to rearrange the source data elements between a regular N-way interleaved order and a de-interleaved order in order to produce a sequence of result data elements; and outputting the sequence of result data elements for storing in the register data store. This provides a particularly efficient technique for performing N-way interleave and de-interleave operations, where N is an odd number, resulting in high performance, low energy consumption, and reduced register use when compared with known prior art techniques.
摘要:
A non-volatile mass storage device is provided comprising memory circuitry accessible to a host data processing device via a communication link. The non-volatile mass storage device comprises processing circuitry for locally accessing the memory circuitry of the file system and is capable of triggering generation of a file for storage on the memory circuitry by connection of the non-volatile mass storage device to the host data processing device. The generated file comprises information dependent upon a state of the non-volatile mass storage device. A corresponding method of operating a non-volatile mass storage device is provided and a computer program is provided for obtaining the information dependent upon the state of the non-volatile mass storage device, for locally accessing the memory circuitry and for generating the file for storage on the memory circuitry.
摘要:
A data processing apparatus and method provide fault tolerance when executing a sequence of data processing operations. The data processing apparatus has processing circuitry for performing the sequence of data processing operations, and a redundant copy of that processing circuitry for operating in parallel with the processing circuitry, and for performing the same sequence of data processing operations. Error detection circuitry detects an error condition when output data generated by the processing circuitry differs from corresponding output data generated by the redundant copy. Shared prediction circuitry generates predicted data input to both the processing circuitry and the redundant copy, with the processing circuitry and redundant copy then performing speculative processing of one or more data processing operations in dependence on that predicted data. Each of the processing circuitry and the redundant copy include checking circuitry for determining whether the speculative processing was correct, and initiating corrective action if the speculative processing was not correct. By sharing the prediction circuitry rather than replicating it within both the processing circuitry and the redundant copy, significant area and power consumption benefits can be achieved without affecting the ability of the apparatus to detect faults.
摘要:
An electrical receptacle includes at least one motion sensor for detecting movement of a blade of an electrical plug in the receptacle, an extraction detector operatively connected to the motion sensor for generating a signal in response to movement of the blade at a predetermined rate, a position detector operatively connected to the motion sensor for determining the position of the blade in the receptacle, a switch operatively connected to the extraction detector and the position detector for de-energizing the receptacle when the extraction detector detects extraction of the blade from the receptacle at a rate equal to or greater than the predetermined rate and wherein the extraction detector and switch are operative to de-energize the receptacle in less than six milliseconds when the extraction detector detects extraction of the blade from the receptacle at a rate equal to or greater than the predetermined rate.
摘要:
An electrical receptacle includes at least one motion sensor for detecting movement of a blade of an electrical plug in the receptacle, an extraction detector operatively connected to the motion sensor for generating a signal in response to movement of the blade at a predetermined rate, a position detector operatively connected to the motion sensor for determining the position of the blade in the receptacle, a switch operatively connected to the extraction detector and the position detector for de-energizing the receptacle when the extraction detector detects extraction of the blade from the receptacle at a rate equal to or greater than the predetermined and wherein the extraction detector and switch are operative to de-energize the receptacle in less than six milliseconds when the extraction detector detects extraction of the blade from the receptacle at a rate equal to or greater than the predetermined rate.
摘要:
Data processing apparatus and method perform data processing operations on floating point data elements. The data processing apparatus has processing logic for performing data processing operations on the floating point data elements, and decode logic operable to decode a data processing instruction in order to determine a corresponding data processing operation to be performed by the processing logic. The data processing instruction has an m-bit immediate value encoded therein. Further, constant generation logic is provided to perform a logical operation on the m-bit immediate value in order to generate an n-bit floating point constant for use as at least one input floating point data element for the processing logic when performing the corresponding data processing operation. The values “n” and “m” are integers, and n is greater than m. This approach provides a particularly efficient technique for generating floating point constants.
摘要:
An integrated circuit, and method of reviewing values of one or more signals occurring within that integrated circuit, are provided. The integrated circuit comprises processing logic for executing a program, and monitoring logic for reviewing values of one or more signals occurring within the integrated circuit as a result of execution of the program. The monitoring logic stores configuration data, which can be software programmed in relation to the signals to be monitored. Further, the monitoring logic makes use of a Bloom filter which, for a value to be reviewed, performs a hash operation on that value in order to reference the configuration data to determine whether that value is either definitely not a value within the range or is potentially a value within the range of values. If the value is determined to be within the set of values, then a trigger signal is generated which can be used to trigger a further monitoring process.
摘要:
A method is disclosed for transforming a portion of a computer program comprising a list of sequential instructions comprising control code and data processing code and a program separation indicator indicating a point where said sequential instructions may be divided to form separate sections that are capable of being separately executed and that each comprise different data processing code. The m method comprises the steps of: (i) analysing said portion of said program to determine if said sequential instructions can be divided at said point indicated by said program separation indicator and in response to determining that it can: (iia) providing data communication between said separate sections indicated by said program separation indicator, such that said separate sections can be decoupled from each other, such that at least one of said sections is capable of being separately executed by an execution mechanism that is separate from an execution mechanism executing another of said separate sections, said at least one of said sections being capable of generating data and communicating said data to at least one other of said separate sections; and in response to determining it can not: (iib) not performing step (iia). If step (iia) is not performed then a warning may be output, or the program may be amended so it can be separated at that point, or the program separation indicator may be removed and the sections that were to be separated merged.
摘要:
The present invention features a method of making a gel cosmetic stick. The method comprises first mixing a particulate dibenzylidene alditol with a liquid vehicle which contains an antiperspirant salt dissolved therein to form a uniform dispersion. The dibenzylidene alditol is mixed with the liquid vehicle at a temperature sufficiently low, preferably below 50.degree. C., so that substantially none of the dibenzylidene alditol dissolves in the liquid vehicle. This dispersion may comprise a commercial size quantity, typically greater than 200 kg. A portion of this dispersion, typically a relatively small portion, is then heated to a temperature sufficient to dissolve the dibenzylidene alditol therein, then cooled to form a gel. This heating and cooling is conducted sufficiently rapidly so as to minimize degradation of the dibenzylidene alditol. Preferably the heating and cooling is conducted such that said portion is subjected to a temperature greater than 90.degree. C. for not more than two hours, most preferably not more than thirty minutes.
摘要:
The present invention provides an improved technique for communicating between a central processing unit and a graphics processing unit of a data processing apparatus. Shared memory is provided which is accessible by the central processing unit and the graphics processing unit, and via which data structures are shareable between the central processing unit and the graphics processing unit. A bus is also provided via which the central processing unit, graphics processing unit and shared memory communicate. In accordance with a first mechanism of controlling the graphics processing unit, the central processing unit routes control signals via the bus. However, in addition, an interface is provided between the central processing unit and the graphics processing unit, and in accordance with an additional mechanism for controlling the graphics processing unit, the central processing unit provides control signals over the interface. This enables the GPU to continue to be used to handle large batches of graphics processing operations loosely coupled with the operations performed by the CPU, whilst through use of the additional mechanism it is also possible to employ the GPU to perform processing operations on behalf of the CPU in situations where those operations are tightly coupled with the operations performed by the CPU.