Non-volatile multi-state memory device capable with variable storing
resolution
    1.
    发明授权
    Non-volatile multi-state memory device capable with variable storing resolution 失效
    具有可变存储分辨率的非易失性多状态存储器件

    公开(公告)号:US5768187A

    公开(公告)日:1998-06-16

    申请号:US718928

    申请日:1996-09-25

    IPC分类号: G11C7/16 G11C11/56 G11C11/34

    摘要: This non-volatile multi-state memory device switches a storing resolution of multi-state data corresponding to digital data stored in a non-volatile memory cell according to the data's characteristics. In more detail, digital audio data are output from an ADPCM encoder in n-bit units and m bits of address data indicating an address at which audio data are stored are output from an address controller. These are then input to a switching circuit, a bit number converting circuit converts m bits of address data to n bits of address data at the same level as the m bit data, and the converted n bits of address data and n bits of audio data are inputted to a second multiplexer. An output of the Second multiplexer is then selected in compliance with a switch signal from the address controller and either the selected n bits of address data or the audio data are sent to a read-write circuit. Consequently, for example, writing is carried out with storing resolution deemed as 16 when 4 bits of audio data are stored in an EEPROM cell array and storing resolution deemed as 2 when for instance 1 bit of address data is stored.

    摘要翻译: 该非易失性多状态存储装置根据数据的特性来切换对应于存储在非易失性存储单元中的数字数据的多状态数据的存储分辨率。 更详细地,数字音频数据以n位单位从ADPCM编码器输出,并且从地址控制器输出指示存储音频数据的地址的m位地址数据。 然后将它们输入到开关电路,位数转换电路将m位地址数据转换为与m位数据相同电平的n位地址数据,并将转换的n位地址数据和n位音频数据 被输入到第二多路复用器。 然后根据来自地址控制器的开关信号选择第二多路复用器的输出,并且将所选择的n位地址数据或音频数据发送到读写电路。 因此,例如,当4位音频数据被存储在EEPROM单元阵列中时,将存储分辨率视为16进行写入,并且当存储例如1比特的地址数据时,将分辨率视为2。

    Non-volatile multi-state memory device with memory cell capable of
storing multi-state data
    3.
    发明授权
    Non-volatile multi-state memory device with memory cell capable of storing multi-state data 失效
    具有能够存储多状态数据的存储单元的非易失性多状态存储器件

    公开(公告)号:US5761117A

    公开(公告)日:1998-06-02

    申请号:US697687

    申请日:1996-08-29

    摘要: Inputted digital data are held in a data register and converted to multi-state analog amount by a resistance dividing circuit and a decoder. A comparator compares an analog amount read from a non-volatile memory cell with a converted analog amount; and in accordance with this comparison result, a writing voltage is supplied to a memory cell. A first bias generating circuit is provided for generating two different types of bias voltages as this writing voltage, MOS transistors are inserted as respective switches to the bias voltage supply lines and writing voltages are switched by selectively ON/OFF-controlling one of the MOS transistors in accordance with the upper bit of the inputted digital data. As a result, unnecessary writing time can be eliminated, time required for executing writing can be reduced and circuit configuration can be simplified.

    摘要翻译: 输入的数字数据保存在数据寄存器中,并通过电阻分割电路和解码器转换成多状态模拟量。 比较器将从非易失性存储单元读取的模拟量与转换的模拟量进行比较; 并且根据该比较结果,向存储单元提供写入电压。 提供第一偏置产生电路,用于产生两种不同类型的偏置电压作为该写入电压,将MOS晶体管作为各自的开关插入到偏压电源线,并且通过选择性地对/ 根据输入的数字数据的高位。 结果,可以消除不必要的写入时间,可以减少执行写入所需的时间,并且可以简化电路配置。

    Non-volatile multi-state memory device with memory cell capable of
storing multi-state data
    4.
    发明授权
    Non-volatile multi-state memory device with memory cell capable of storing multi-state data 失效
    具有能够存储多状态数据的存储单元的非易失性多状态存储器件

    公开(公告)号:US5625584A

    公开(公告)日:1997-04-29

    申请号:US697903

    申请日:1996-08-30

    IPC分类号: G11C11/56 G11C13/00

    摘要: A data register for holding input digital data, a resistance dividing circuit for generating a plurality of analog voltages, a decoder for decoding the data of the data register and selectively outputting one of a plurality of analog voltages and a comparator for comparing this decoded output with an analog amount read from a memory cell are provided. In write mode, this memory device sets data to be written in the data register and writes an analog amount corresponding to the set data in the memory cell, in read mode, the apparatus sequentially sets in the data register digital data updated in sequence from a designated value, executes comparison at the comparator for each setting and terminates the digital data setting in response to the comparison result at the data register, thus digital data corresponding to the analog amount read from the memory cell is thereby obtained at the data register. As a result, circuit configuration can be simplified and circuit scale reduced.

    摘要翻译: 用于保持输入数字数据的数据寄存器,用于产生多个模拟电压的电阻分割电路,用于对数据寄存器的数据进行解码并选择性地输出多个模拟电压中的一个的解码器和用于将该解码输出与 提供从存储单元读取的模拟量。 在写入模式下,该存储器件将要写入数据寄存器的数据设置为在读取模式下将与设置数据相对应的模拟量写入存储单元中,该装置顺序地将从数据寄存器 指定值,在每个设置的比较器处执行比较,并且响应于数据寄存器的比较结果终止数字数据设置,从而在数据寄存器处获得与从存储器单元读取的模拟量相对应的数字数据。 结果,可以简化电路配置并减小电路规模。

    Process for producing koji for fermented food products
    5.
    发明授权
    Process for producing koji for fermented food products 失效
    生产发酵食品曲调的方法

    公开(公告)号:US4308284A

    公开(公告)日:1981-12-29

    申请号:US142690

    申请日:1980-04-22

    CPC分类号: A23L11/09

    摘要: In a process for producing koji for a fermented food product which comprises inoculating a koji mold in a modified koji substrate and cultivating it at a temperature of about 20.degree. C. to about 40.degree. C. for a time sufficient to produce koji for the fermented food product in the presence of a salt of an aliphatic carboxylic acid with up to 4 carbon atoms; the improvement wherein the cultivation is carried out in the presence of at least one added member selected from the group consisting of lactic acid bacteria and yeasts.

    摘要翻译: 在用于生产发酵食品的曲子的方法中,包括将曲霉菌接种在改性曲柄底物中并在约20℃至约40℃的温度下培养足以产生发酵的曲的时间 在具有至多4个碳原子的脂族羧酸的盐存在下的食品; 其中所述培养是在选自乳酸菌和酵母中的至少一种添加剂存在下进行的。