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    Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values
    1.
    发明授权
    Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values 有权
    通过处理分组延迟值来补偿时钟频率和相位变化的装置和方法

    公开(公告)号：US08031747B2

    公开(公告)日：2011-10-04

    申请号：US12432630

    申请日：2009-04-29

    申请人： Charles F. Barry ,  Meenakshi S. Subramanian ,  Feng Frank Pan ,  Tian (Alan) Shen ,  Philip Kruzinski ,  Guochun (George) Zhao ,  DeviPrasad Natesan ,  David R. Jorgensen

    发明人： Charles F. Barry ,  Meenakshi S. Subramanian ,  Feng Frank Pan ,  Tian (Alan) Shen ,  Philip Kruzinski ,  Guochun (George) Zhao ,  DeviPrasad Natesan ,  David R. Jorgensen

    IPC分类号： H04J3/06

    CPC分类号： H04J3/0682 ,  H04J3/0667

    摘要： An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.

    摘要翻译： 描述了通过处理分组延迟值来补偿电子部件的频率和相位变化的装置和方法。 在一个实施例中，分组延迟确定模块基于与第一和第二电子组件相关联的时间值来确定分组延迟值。 分组延迟选择模块基于第一电子部件的最大频率漂移来选择分组延迟值的子集。 统计参数确定模块基于分组延迟值的子集的部分来评估第一和第二参数。当分组延迟值的子集包括至少两个分组延迟值的最小值时，验证模块验证参数。 如果参数都被验证，则调整模块基于参数补偿第一电子部件的频率变化和相位变化中的至少一个。

    Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values
    3.
    发明授权
    Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values 有权
    通过处理分组延迟值来补偿时钟频率和相位变化的装置和方法

    公开(公告)号：US08494011B2

    公开(公告)日：2013-07-23

    申请号：US13615329

    申请日：2012-09-13

    申请人： Charles F. Barry ,  Meenakshi S. Subramanian ,  Feng Frank Pan ,  Tian Alan Shen ,  Philip Kruzinski ,  Guochun George Zhao ,  DeviPrasad Natesan ,  David R. Jorgensen

    发明人： Charles F. Barry ,  Meenakshi S. Subramanian ,  Feng Frank Pan ,  Tian Alan Shen ,  Philip Kruzinski ,  Guochun George Zhao ,  DeviPrasad Natesan ,  David R. Jorgensen

    IPC分类号： H04J3/06

    CPC分类号： H04J3/0682 ,  H04J3/0667

    摘要： An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.

    摘要翻译： 描述了通过处理分组延迟值来补偿电子部件的频率和相位变化的装置和方法。 在一个实施例中，分组延迟确定模块基于与第一和第二电子组件相关联的时间值来确定分组延迟值。 分组延迟选择模块基于第一电子部件的最大频率漂移来选择分组延迟值的子集。 统计参数确定模块基于分组延迟值的子集的部分来评估第一和第二参数。 验证模块在分组延迟值的子集包括至少两个分组延迟值的最小值的每个部分时验证参数。 如果参数都被验证，则调整模块基于参数补偿第一电子部件的频率变化和相位变化中的至少一个。

    Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values
    5.
    发明授权
    Apparatus and method of compensating for clock frequency and phase variations by processing packet delay values 有权
    通过处理分组延迟值来补偿时钟频率和相位变化的装置和方法

    公开(公告)号：US08270438B2

    公开(公告)日：2012-09-18

    申请号：US13221722

    申请日：2011-08-30

    申请人： Charles F. Barry ,  Meenakshi S. Subramanian ,  Feng Frank Pan ,  Tian Alan Shen ,  Philip Kruzinski ,  Guochun George Zhao ,  DeviPrasad Natesan ,  David R. Jorgensen

    发明人： Charles F. Barry ,  Meenakshi S. Subramanian ,  Feng Frank Pan ,  Tian Alan Shen ,  Philip Kruzinski ,  Guochun George Zhao ,  DeviPrasad Natesan ,  David R. Jorgensen

    IPC分类号： H04J3/06

    CPC分类号： H04J3/0682 ,  H04J3/0667

    摘要： An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.

    摘要翻译： 描述了通过处理分组延迟值来补偿电子部件的频率和相位变化的装置和方法。 在一个实施例中，分组延迟确定模块基于与第一和第二电子组件相关联的时间值来确定分组延迟值。 分组延迟选择模块基于第一电子部件的最大频率漂移来选择分组延迟值的子集。 统计参数确定模块基于分组延迟值的子集的部分来评估第一和第二参数。 验证模块在分组延迟值的子集包括至少两个分组延迟值的最小值的每个部分时验证参数。 如果参数都被验证，则调整模块基于参数补偿第一电子部件的频率变化和相位变化中的至少一个。

    APPARATUS AND METHOD OF COMPENSATING FOR CLOCK FREQUENCY AND PHASE VARIATIONS BY PROCESSING PACKET DELAY VALUES
    6.
    发明申请
    APPARATUS AND METHOD OF COMPENSATING FOR CLOCK FREQUENCY AND PHASE VARIATIONS BY PROCESSING PACKET DELAY VALUES 有权
    通过处理分组延迟值对时钟频率和相位变化进行补偿的装置和方法

    公开(公告)号：US20110310766A1

    公开(公告)日：2011-12-22

    申请号：US13221722

    申请日：2011-08-30

    申请人： Charles F. Barry ,  Meenakshi S. Subramanian ,  Feng Frank Pan ,  Tian (Alan) Shen ,  Philip Kruzinski ,  Guochun George Zhao ,  DeviPrasad Natesan ,  David R. Jorgensen

    发明人： Charles F. Barry ,  Meenakshi S. Subramanian ,  Feng Frank Pan ,  Tian (Alan) Shen ,  Philip Kruzinski ,  Guochun George Zhao ,  DeviPrasad Natesan ,  David R. Jorgensen

    IPC分类号： H04L12/26

    CPC分类号： H04J3/0682 ,  H04J3/0667

    摘要： An apparatus and method are described for compensating for frequency and phase variations of electronic components by processing packet delay values. In one embodiment, a packet delay determination module determines packet delay values based on time values associated with a first and a second electronic component. A packet delay selection module selects a subset of the packet delay values based on the maximum frequency drift of the first electronic component. A statistical parameter determination module evaluates a first and a second parameter based on portions of the subset of packet delay values. A validation module validates the parameters when each portion the subset of packet delay values includes a minimum of at least two packet delay values. An adjustment module compensates for at least one of a frequency variation and a phase variation of the first electronic component based on the parameters if the parameters are both validated.

    摘要翻译： 描述了通过处理分组延迟值来补偿电子部件的频率和相位变化的装置和方法。 在一个实施例中，分组延迟确定模块基于与第一和第二电子组件相关联的时间值来确定分组延迟值。 分组延迟选择模块基于第一电子部件的最大频率漂移来选择分组延迟值的子集。 统计参数确定模块基于分组延迟值的子集的部分来评估第一和第二参数。 验证模块在分组延迟值的子集包括至少两个分组延迟值的最小值的每个部分时验证参数。 如果参数都被验证，则调整模块基于参数补偿第一电子部件的频率变化和相位变化中的至少一个。

    Method for comparing accomplishments between players
    7.
    发明申请
    Method for comparing accomplishments between players 审中-公开
    比较玩家成绩的方法

    公开(公告)号：US20070173321A1

    公开(公告)日：2007-07-26

    申请号：US11335966

    申请日：2006-01-20

    申请人： Alan Shen ,  Henry Morgan ,  Michal Bortnik ,  Patrick O'Kelley ,  Vincent Curley

    发明人： Alan Shen ,  Henry Morgan ,  Michal Bortnik ,  Patrick O'Kelley ,  Vincent Curley

    IPC分类号： A63F13/00

    CPC分类号： A63F13/798 ,  A63F13/12 ,  A63F13/335 ,  A63F13/537 ,  A63F13/69 ,  A63F13/71 ,  A63F2300/558 ,  A63F2300/609

    摘要： Accomplishments among players in a gaming environment are compared. A data store that stores a plurality of user profiles which comprise information gathered from users playing one or more video games on a game console. Various accomplishments and achievements attained by the players are associated with the user profile and includes achievement stamps for unlocking various achievements in particular games. At least two user profiles may be selected from the data store to extract information related to accomplishments and achievements the selected players. The selected information may then be displayed simultaneously to facilitate comparison of the players accomplishments.

    摘要翻译： 比较游戏环境中玩家的成就。 存储多个用户简档的数据存储器，其包括从游戏机上播放一个或多个视频游戏的用户收集的信息。 玩家获得的各种成就和成就与用户资料相关联，并且包括用于解锁特定游戏中的各种成就的成就邮票。 可以从数据存储器中选择至少两个用户简档，以提取与所选玩家的成就和成就相关的信息。 然后可以同时显示所选择的信息以便于玩家成就的比较。

    Apparatus and method of scheduling timing packets to enhance time distribution in telecommunication networks
    8.
    发明授权
    Apparatus and method of scheduling timing packets to enhance time distribution in telecommunication networks 有权
    调度定时分组的装置和方法，以增强电信网络中的时间分布

    公开(公告)号：US08670459B2

    公开(公告)日：2014-03-11

    申请号：US12628088

    申请日：2009-11-30

    申请人： Charles Frederick Barry ,  Tian (Alan) Shen ,  Feng Frank Pan ,  DeviPrasad Natesan

    发明人： Charles Frederick Barry ,  Tian (Alan) Shen ,  Feng Frank Pan ,  DeviPrasad Natesan

    IPC分类号： H04J15/00

    CPC分类号： H04J3/0661

    摘要： An apparatus and method of scheduling timing packets to enhance time distribution includes an improved apparatus in a system in which at least one of time and frequency information is derived based on information distributed in timing packets, at least some of the timing packets being transmitted by or received by the apparatus. The improvement includes a scheduling module that determines a first packet transmission time offset of a first timing packet based on a first predetermined identifier associated with the apparatus, and a second packet transmission time offset of a second timing packet based on the first packet transmission time offset and a timing packet spacing that is independent of the first predetermined identifier. The improvement further includes a transmission module that transmits the first timing packet based on the first packet transmission time offset, and the second timing packet based on the second packet transmission time offset.

    摘要翻译： 调度定时分组以增强时间分布的装置和方法包括系统中的改进装置，其中基于在定时分组中分发的信息导出时间和频率信息中的至少一个，至少一些定时分组由 由设备接收。 改进包括调度模块，其基于与设备相关联的第一预定标识符确定第一定时分组的第一分组传输时间偏移，以及基于第一分组传输时间偏移量的第二定时分组的第二分组传输时间偏移 以及独立于第一预定标识符的定时分组间隔。 该改进还包括基于第一分组传输时间偏移发送第一定时分组的传输模块和基于第二分组传输时间偏移的第二定时分组。