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公开(公告)号：US20170321540A1
公开(公告)日：2017-11-09
申请号：US15318322
申请日：2016-01-11
申请人： Yinghui Lu , Avinash Vinayak Taware , Paris Smaragdis , Nam Nguyen , David Alan Welsh , Clifford Lloyd Macklin , Daniel Viassolo , Halliburton Energy Services, Inc.
发明人： Yinghui Lu , Avinash Vinayak Taware , Paris Smaragdis , Nam Nguyen , David Alan Welsh , Clifford Lloyd Macklin , Daniel Viassolo
CPC分类号： E21B47/101 , G01H17/00 , G01V1/40 , G01V2210/123 , G01V2210/1429 , G01V2210/43
摘要： Disclosed are tools, systems, and methods for detecting one or more underground acoustic sources and localizing them in depth and radial distance from a wellbore, for example, for the purpose of finding underground fluid flows, such as may result from leaks in the well barriers. In various embodiments, acoustic-source detection and localization are accomplished with an array of at least three acoustic sensors disposed in the wellbore, in conjunction with array signal processing.
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2.发明授权Method and system for managing block reclaim operations in a multi-layer memory 有权用于管理多层存储器中的块回收操作的方法和系统公开(公告)号：US09348746B2
公开(公告)日：2016-05-24
申请号：US13826944
申请日：2013-03-14
CPC分类号： G06F12/0246 , G06F3/0644 , G06F12/0253 , G06F12/0646 , G06F12/12
摘要： A multi-later memory and method for operation is disclosed. The memory includes at least one flash memory die having multiple layers and a controller configured to execute block reclaim operations in a layer of the flash memory die until a net gain of at least one additional free block has been made in the layer. The method may include relocating data from reclaim blocks to relocation blocks within the same layer, or within a same partition in the same layer until a net gain of one free block has been achieved and an integer number of relocation blocks has been filled with relocated data. The method may also include moving data from reclaim blocks in a first layer into destination blocks in a second layer until a net gain of at least one free block has been achieved in the first layer.
摘要翻译： 公开了一种用于操作的多功能记忆体和方法。 存储器包括至少一个具有多个层的闪速存储器管芯和被配置为在闪速存储器管芯的层中执行块回收操作的控制器，直到在该层中已经进行了至少一个附加自由块的净增益。 该方法可以包括将数据从回收块重定位到相同层内的重定位块或同一层内的相同分区内，直到已经实现了一个空闲块的净增益，并且整数个重定位块已被重定位数据填充 。 该方法还可以包括将数据从第一层中的回收块移动到第二层中的目标块，直到在第一层中已经实现了至少一个空闲块的净增益。
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3.发明申请METHOD AND SYSTEM FOR MANAGING BACKGROUND OPERATIONS IN A MULTI-LAYER MEMORY 有权用于管理多层存储器中的背景操作的方法和系统公开(公告)号：US20140189207A1
公开(公告)日：2014-07-03
申请号：US13827038
申请日：2013-03-14
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F3/0679 , G06F12/0253 , G06F2212/7205
摘要： A multi-layer memory and method for performing background maintenance operations are disclosed. The memory includes a plurality of flash memory die having multiple layers, where each layer is made up of flash memory cells having a greater bit per cell storage capacity than then prior layer and each layer may have a plurality of partitions for different data types. A controller managing the flash memory die is configured to identify an idle die and determine if a layer in the die satisfies a background maintenance criterion. Upon identifying a layer satisfying the background maintenance criterion, the valid data from reclaim blocks in the layer is relocated into a relocation block in the same layer until the relocation block is filled and the background maintenance cycle ends.
摘要翻译： 公开了一种用于执行后台维护操作的多层存储器和方法。 存储器包括具有多个层的多个闪速存储器管芯，其中每个层由具有比之前的先前层更大的每个存储单元的位的闪存单元构成，并且每个层可以具有用于不同数据类型的多个分区。 管理闪存芯片的控制器被配置为识别空闲裸片，并且确定模具中的层是否满足背景维护标准。 在识别满足背景维护标准的层时，将层中回收块的有效数据重新定位到相同层中的重定位块中，直到重新定位块被填充并且后台维护周期结束。
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4.发明申请公开(公告)号：US20140185376A1
公开(公告)日：2014-07-03
申请号：US13826848
申请日：2013-03-14
IPC分类号： G11C16/10
CPC分类号： G11C16/10 , G06F3/0613 , G06F3/0658 , G06F3/0688 , G06F12/0246 , G11C11/5628 , G11C2211/5641
摘要： A mass storage memory system and method of operation is disclosed. The memory includes an interface adapted to receive data from a host, a plurality of flash memory die and a controller, where the controller is configured to receive a first command and read or write data synchronously across the plurality of die based on a first command, and to receive a second command and read or write data asynchronously and independently in each die based on a second command. The controller may program data in a maximum unit of programming for an individual one of the plurality of flash memory die. The controller may be a plurality of controllers each configured to select which die of an exclusive subset of die to write data based on characteristics of the die in the subset. The plurality of die may be multi-layer, and multi-partition per layer, flash memory die.
摘要翻译： 公开了大容量存储存储器系统和操作方法。 存储器包括适于从主机，多个闪存存储器模块和控制器接收数据的接口，其中控制器被配置为基于第一命令来接收第一命令并且跨多个管芯同步地读取或写入数据， 并且基于第二命令接收第二命令并且在每个管芯中异步且独立地读取或写入数据。 控制器可以针对多个闪存存储器芯片中的一个的最大编程单元编程数据。 控制器可以是多个控制器，每个控制器被配置为基于子集中的管芯的特性来选择管芯的独占子集的哪个管芯写入数据。 多个芯片可以是多层的，每层多分区，闪存芯片。
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5.发明授权公开(公告)号：US08103841B2
公开(公告)日：2012-01-24
申请号：US12239489
申请日：2008-09-26
IPC分类号： G06F12/16
CPC分类号： G06F11/1666 , G06F11/1072 , G06F11/141 , G06F11/1415 , G06F11/1658 , G06F12/0246 , G06F2212/7202 , G06F2212/7203 , G06F2212/7205 , G06F2212/7208 , G11C11/5621 , G11C11/5628 , G11C16/102 , G11C16/105 , G11C16/20 , G11C29/00 , G11C29/76 , G11C2211/5641
摘要： In a nonvolatile memory with block management system that supports update blocks with non-sequential logical units, an index of the logical units in a non-sequential update block is buffered in RAM and stored periodically into the nonvolatile memory. In one embodiment, the index is stored in a block dedicated for storing indices. In another embodiment, the index is stored in the update block itself. In yet another embodiment, the index is stored in the header of each logical unit. In another aspect, the logical units written after the last index update but before the next have their indexing information stored in the header of each logical unit. In this way, after a power outage, the location of recently written logical units can be determined without having to perform a scanning during initialization. In yet another aspect, a block is managed as partially sequential and partially non-sequential, directed to more than one logical subgroup.
摘要翻译： 在具有支持具有非顺序逻辑单元的更新块的块管理系统的非易失性存储器中，非顺序更新块中的逻辑单元的索引被缓冲在RAM中并被周期性地存储到非易失性存储器中。 在一个实施例中，索引被存储在专用于存储索引的块中。 在另一个实施例中，索引被存储在更新块本身中。 在另一个实施例中，索引被存储在每个逻辑单元的标题中。 在另一方面，在最后一个索引更新之后但在下一个之前写入的逻辑单元将其索引信息存储在每个逻辑单元的标题中。 以这种方式，在断电之后，可以确定最近写入的逻辑单元的位置，而不必在初始化期间执行扫描。 在另一方面，块被部署顺序地且部分地非顺序地管理，定向到多于一个的逻辑子组。
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公开(公告)号：US07409489B2
公开(公告)日：2008-08-05
申请号：US11259423
申请日：2005-10-25
申请人： Alan Welsh Sinclair
发明人： Alan Welsh Sinclair
CPC分类号： G06F17/30218 , G06F3/0605 , G06F3/0608 , G06F3/0613 , G06F3/064 , G06F3/0643 , G06F3/0644 , G06F3/0652 , G06F3/0679 , G06F12/0246 , G06F2212/7202 , G06F2212/7205 , G11C16/0483 , G11C16/102
摘要： In a non-volatile memory array, scheduling of reclaim operations to occur before a shortage of erased blocks arises avoids extended periods of reclaim that could exceed a time limit. A memory controller uses information regarding the data stored in the memory array to estimate the additional host data that may be programmed and the reclaim operations to be performed and schedules the reclaim operations to be evenly distributed between write operations until the memory is full.
摘要翻译： 在非易失性存储器阵列中，在擦除块的不足之前发生的回收操作的调度避免了可能超过时间限制的延长的回收期。 存储器控制器使用关于存储在存储器阵列中的数据的信息来估计可编程的附加主机数据和要执行的回收操作，并且将回收操作调度为在写操作之间均匀分布，直到存储器已满。
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公开(公告)号：US06696375B2
公开(公告)日：2004-02-24
申请号：US08485304
申请日：1995-06-07
IPC分类号： C03C3704
CPC分类号： C01B33/158 , C09D7/42 , Y10S423/15
摘要： An improved flatting agent comprising an inorganic hydrogel having a pore volume of at least 1.0 ml/g, an average particle size in the range 1 to 10 microns, and a particle size distribution such that when the flatting agent is dispersed in a coating, the fineness of grind is at least 4.75 on the Hegman scale. The inorganic hydrogel flatting agents of this invention are prepared by milling an inorganic hydrogel under controlled temperature conditions wherein a volatiles content of at least 40 weight percent is maintained, to produce inorganic hydrogel particles characterized by a pore volume of at least 1.0 ml/g, an average particle size in the range of 1 to 10 microns, and a particle size distribution such that when the flatting agent is dispersed in a coating, the fineness of grind is at least 4.75 on the Hegman scale. Also provided in accordance with this invention are improved coating compositions comprising a full gloss coating containing the above described flatting agents dispersed in the full gloss coating in from 3 to 15 weight percent loading on a solids basis.
摘要翻译： 一种改进的消光剂，其包含孔体积至少为1.0ml / g，平均粒径在1-10微米范围内的无机水凝胶，以及当将该均化剂分散在涂层中时的粒度分布， 研磨的细度在Hegman量表上至少为4.75。 本发明的无机水凝胶糊化剂通过在其中保持至少40重量％的挥发物含量的控制温度条件下研磨无机水凝胶来制备，以产生特征在于至少1.0ml / g的孔体积的无机水凝胶颗粒， 平均粒度在1至10微米范围内，并且粒度分布使得当平坦化剂分散在涂层中时，研磨细度在Hegman量级上至少为4.75。 根据本发明还提供了改进的涂料组合物，其包含以固体为基础以3至15重量％的载量分散在全光泽涂层中的全光泽涂层。
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公开(公告)号：US06285607B1
公开(公告)日：2001-09-04
申请号：US09647194
申请日：2000-10-20
申请人： Alan Welsh Sinclair
发明人： Alan Welsh Sinclair
IPC分类号： G11C700
CPC分类号： G11C29/88
摘要： A memory system (10) incorporating a plurality of memory devices (42) at least one of which has a defective location. Defects are mapped in a non-volatile memory (46). Data structures are divided into portions which are respectively stored in different ones of the memory devices (42). The controller (17) of the system accesses the non-volatile memory so as to generate on a per device basis an address corresponding to a non-defective location in that device. In this system, different addresses may therefore be applied to different ones of the devices (42) when a data structure is written to or read from the memory devices.
摘要翻译： 一种内存有多个存储器件（42）的存储器系统（10），其中至少一个具有缺陷位置。 缺陷被映射到非易失性存储器（46）中。 数据结构分为存储在不同存储器件（42）中的部分。 系统的控制器（17）访问非易失性存储器，以便在每个设备的基础上生成对应于该设备中的无缺陷位置的地址。 因此，在该系统中，当将数据结构写入或从存储器件读取时，不同的地址因此可以应用于不同的设备（42）。
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9.发明授权Memory system having an unequal number of memory die on different control channels 有权在不同的控制信道上具有不相等数量的存储器的存储器系统公开(公告)号：US09223693B2
公开(公告)日：2015-12-29
申请号：US13827499
申请日：2013-03-14
IPC分类号： G06F12/02
CPC分类号： G06F12/0246 , G06F2212/7202 , G06F2212/7204 , G06F2212/7208
摘要： A flash memory system having unequal number of memory die and method for operation are disclosed. The memory system includes a plurality of flash memory die distributed unevenly among different control lines, such that there are an unequal number of die between control lines. A total physical capacity of the plurality of flash memory die is greater than a total logical capacity such that the memory system is over provisioned with physical capacity. A logical address splitter directs data received from a host system and associated with host logical block addresses such that each control line only receives data associated with predetermined host logical block address ranges and directs the data such that a ratio of physical capacity to logical capacity is equal among each of the control lines, regardless of the different number of die and associated different physical capacity per control line.
摘要翻译： 公开了一种具有不等数量的存储器管芯和操作方法的闪存系统。 存储器系统包括在不同控制线之间不均匀地分布的多个闪速存储器管芯，使得在控制线之间存在不相等数量的管芯。 多个闪存芯片的总物理容量大于总逻辑容量，使得存储器系统过度提供物理容量。 逻辑地址分配器指导从主机系统接收的并与主机逻辑块地址相关联的数据，使得每个控制线仅接收与预定主机逻辑块地址范围相关联的数据，并引导数据，使得物理容量与逻辑容量之比相等 在每个控制线中，不管每个控制线的管芯数量和不同物理容量的数量不同。
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公开(公告)号：US08873284B2
公开(公告)日：2014-10-28
申请号：US13827204
申请日：2013-03-14
IPC分类号： G11C16/04
CPC分类号： G06F12/0246 , G06F2212/7205
摘要： A multi-layer memory and method for operation is disclosed. The memory includes an interface, at least one flash memory die having a plurality of layers and a controller. The controller is configured to select an appropriate one of a predetermined number of program cycles for programming a fixed amount of host data, and for carrying out maintenance operations in one or more of the layers sufficient to permit a next host data write operation. The controller calculates an interleave ratio of maintenance operations to host data programming operations in each of the layers used in the determined programming cycle so that creation of free space is interspersed with host data writes in a steady manner during execution of the determined programming cycle.
摘要翻译： 公开了一种用于操作的多层存储器和方法。 存储器包括接口，至少一个具有多个层的闪存芯片和控制器。 控制器被配置为选择用于编程固定数量的主机数据的预定数量的编程周期中的适当的一个，并且用于在足以允许下一个主机数据写入操作的一个或多个层中执行维护操作。 控制器计算维护操作的交织比，以在所确定的编程周期中使用的每个层中的主机数据编程操作，从而在确定的编程周期的执行期间，以可靠的方式使主机数据写入分散。
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