PHASE LOCKED LOOP BASED FREQUENCY MODULATOR WITH ACCURATE OSCILLATOR GAIN ADJUSTMENT
    2.
    发明申请
    PHASE LOCKED LOOP BASED FREQUENCY MODULATOR WITH ACCURATE OSCILLATOR GAIN ADJUSTMENT 失效
    具有精确振荡器增益调整的相位锁定环路频率调制器

    公开(公告)号:US20090322439A1

    公开(公告)日:2009-12-31

    申请号:US12147275

    申请日:2008-06-26

    IPC分类号: H03C3/00

    摘要: A frequency modulator includes a tuning circuit configured to determine a nominal gain characteristic of a digitally controlled oscillator (DCO) in a first mode, and to determine an actual gain characteristic of the DCO in a second mode using the nominal gain characteristic. The frequency modulator also comprises a modulation circuit comprising the DCO coupled to the tuning circuit, configured to modulate a frequency of a DCO output signal with a modulation signal input, and to scale the modulated DCO output signal based on the actual gain characteristic in the second mode to provide gain compensation and frequency modulation of the DCO. The tuning circuit may include a select switch to couple a minimal and maximal tuning word to the DCO in the first mode and an actual operating point word in the second mode to the DCO to determine the nominal gain characteristic.

    摘要翻译: 频率调制器包括调谐电路,该调谐电路被配置为在第一模式中确定数字控制振荡器(DCO)的标称增益特性,并且使用标称增益特性来确定第二模式中的DCO的实际增益特性。 频率调制器还包括调制电路,该调制电路包括耦合到调谐电路的DCO,其被配置为通过调制信号输入来调制DCO输出信号的频率,并且根据第二调制信号中的实际增益特性来缩放经调制的DCO输出信号 模式,以提供DCO的增益补偿和频率调制。 调谐电路可以包括选择开关,以将最小和最大调谐字耦合到第一模式中的DCO,并将第二模式中的实际工作点字耦合到DCO以确定额定增益特性。

    Phase locked loop based frequency modulator with accurate oscillator gain adjustment
    4.
    发明授权
    Phase locked loop based frequency modulator with accurate oscillator gain adjustment 失效
    基于锁相环的频率调制器,具有精确的振荡器增益调整

    公开(公告)号:US07760042B2

    公开(公告)日:2010-07-20

    申请号:US12147275

    申请日:2008-06-26

    IPC分类号: H03C3/09 H03C3/06

    摘要: A frequency modulator includes a tuning circuit configured to determine a nominal gain characteristic of a digitally controlled oscillator (DCO) in a first mode, and to determine an actual gain characteristic of the DCO in a second mode using the nominal gain characteristic. The frequency modulator also comprises a modulation circuit comprising the DCO coupled to the tuning circuit, configured to modulate a frequency of a DCO output signal with a modulation signal input, and to scale the modulated DCO output signal based on the actual gain characteristic in the second mode to provide gain compensation and frequency modulation of the DCO. The tuning circuit may include a select switch to couple a minimal and maximal tuning word to the DCO in the first mode and an actual operating point word in the second mode to the DCO to determine the nominal gain characteristic.

    摘要翻译: 频率调制器包括调谐电路,该调谐电路被配置为在第一模式中确定数字控制振荡器(DCO)的标称增益特性,并且使用标称增益特性来确定第二模式中的DCO的实际增益特性。 频率调制器还包括调制电路,该调制电路包括耦合到调谐电路的DCO,其被配置为通过调制信号输入来调制DCO输出信号的频率,并且根据第二调制信号中的实际增益特性来缩放经调制的DCO输出信号 模式,以提供DCO的增益补偿和频率调制。 调谐电路可以包括选择开关,以将最小和最大调谐字耦合到第一模式中的DCO,并将第二模式中的实际工作点字耦合到DCO以确定额定增益特性。

    Clock control for data synchronization in varactor arrays
    5.
    发明授权
    Clock control for data synchronization in varactor arrays 有权
    变容二极管阵列中数据同步的时钟控制

    公开(公告)号:US07795985B2

    公开(公告)日:2010-09-14

    申请号:US12272084

    申请日:2008-11-17

    IPC分类号: H03L7/099

    CPC分类号: H03J3/04 H03J2200/10

    摘要: Implementations of varactor systems compare current data with immediately prior data to determine whether there has been a change in the data, and enable a clock signal for data paths which have changed data.

    摘要翻译: 变容二极管系统的实现将当前数据与紧接在前的数据进行比较,以确定数据是否发生变化,并为数据路径改变了数据的时钟信号。

    Common Mode Rejection Circuit
    7.
    发明申请
    Common Mode Rejection Circuit 有权
    共模抑制电路

    公开(公告)号:US20130135057A1

    公开(公告)日:2013-05-30

    申请号:US13304438

    申请日:2011-11-25

    IPC分类号: H03B5/12 H03B5/00 H03F3/45

    摘要: An electrical circuit includes a circuit element and a common mode rejection circuit element. The circuit element is configured to operate at a selected frequency within a variable frequency range and the common mode rejection circuit element is configured to reject a common mode current through the circuit element, wherein the common mode rejection circuit element is adjustable.

    摘要翻译: 电路包括电路元件和共模抑制电路元件。 电路元件被配置为在可变频率范围内以选定的频率工作,并且共模抑制电路元件被配置为拒绝通过电路元件的共模电流,其中共模抑制电路元件是可调节的。

    Common mode rejection circuit
    9.
    发明授权
    Common mode rejection circuit 有权
    共模抑制电路

    公开(公告)号:US08773211B2

    公开(公告)日:2014-07-08

    申请号:US13304438

    申请日:2011-11-25

    IPC分类号: H03B5/12

    摘要: An electrical circuit includes a circuit element and a common mode rejection circuit element. The circuit element is configured to operate at a selected frequency within a variable frequency range and the common mode rejection circuit element is configured to reject a common mode current through the circuit element, wherein the common mode rejection circuit element is adjustable.

    摘要翻译: 电路包括电路元件和共模抑制电路元件。 电路元件被配置为在可变频率范围内以选定的频率工作,并且共模抑制电路元件被配置为拒绝通过电路元件的共模电流,其中共模抑制电路元件是可调节的。