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    Frame buffer control for smooth video display
    2.
    发明授权
    Frame buffer control for smooth video display 有权
    帧缓冲控制，用于平滑的视频显示

    公开(公告)号：US07683906B2

    公开(公告)日：2010-03-23

    申请号：US11359106

    申请日：2006-02-22

    申请人： Jay Senior ,  Stephen J. Estrop ,  Anuj B. Gosalia ,  David R. Blythe ,  Joseph C. Ballantyne ,  Kan Qiu ,  Gregory D. Swedberg ,  John (Mingtzong) Lee

    发明人： Jay Senior ,  Stephen J. Estrop ,  Anuj B. Gosalia ,  David R. Blythe ,  Joseph C. Ballantyne ,  Kan Qiu ,  Gregory D. Swedberg ,  John (Mingtzong) Lee

    IPC分类号： G06T15/00

    CPC分类号： G09G5/39 ,  G09G2340/0435

    摘要： Video frame buffers are controlled using a sequence of new-frame-indicators (e.g., FLIP) and no-new-frame-indicators (e.g., NOFLIP) in a frame indicator queue that is accessed with each display refresh. Video samples are loaded into a chain of video frame buffers that is “rotated” during the vertical blanking signal of the display to swap an old frame buffer out for a new frame buffer. The rotations of the frame buffer chain are controlled based on the frame indicators in the frame indicator queue to present new video samples to the display in a regular pattern, thereby providing smooth video playback.

    摘要翻译： 在每个显示刷新访问的帧指示符队列中，使用新帧指示符序列（例如，FLIP）和无新帧指示符（例如，NOFLIP）来控制视频帧缓冲器。 视频样本被加载到视频帧缓冲器链中，该视频帧缓冲器在显示器的垂直消隐信号期间被“旋转”，以将新的帧缓冲器交换出来用于新的帧缓冲器。 基于帧指示符队列中的帧指示符来控制帧缓冲链的转动，以规则模式将新的视频样本呈现给显示器，从而提供平滑的视频回放。

    Parallel engine support in display driver model
    4.
    发明授权
    Parallel engine support in display driver model 有权
    平行引擎支持显示驱动程序模型

    公开(公告)号：US07830387B2

    公开(公告)日：2010-11-09

    申请号：US11557301

    申请日：2006-11-07

    申请人： Steve Pronovost ,  Anuj B. Gosalia ,  Ameet Arun Chitre

    发明人： Steve Pronovost ,  Anuj B. Gosalia ,  Ameet Arun Chitre

    IPC分类号： G06F15/00 ,  G06F15/16 ,  G06T1/00

    CPC分类号： G06F9/4843 ,  G06F3/14 ,  G06F9/461 ,  G06F9/5016 ,  G06F9/5061 ,  G06F9/544 ,  G06T7/0004 ,  G09G5/363

    摘要： Systems and methods that independently control divided and/or isolated processing resources of a Graphical Processing Unit (GPU). Synchronization primitives for processing are shared among such resources to process interaction with the engines and their associated different requirements (e.g. different language). Accordingly, independent threads can be created against particular nodes (e.g., a video engine node, 3D engine node), wherein multiple engines can exist under a single node, and independent control can subsequently be exerted upon the plurality of engines associated with the GPU.

    摘要翻译： 独立控制图形处理单元（GPU）的分割和/或隔离处理资源的系统和方法。 用于处理的同步原语在这些资源之间共享以处理与引擎及其相关联的不同要求（例如不同语言）的交互。 因此，可以针对特定节点（例如，视频引擎节点，3D引擎节点）创建独立线程，其中多个引擎可以存在于单个节点下，并且随后可以在与GPU相关联的多个引擎上施加独立控制。

    Multithreaded kernel for graphics processing unit
    5.
    发明申请
    Multithreaded kernel for graphics processing unit 有权
    用于图形处理单元的多线程内核

    公开(公告)号：US20100122259A1

    公开(公告)日：2010-05-13

    申请号：US12657278

    申请日：2010-01-15

    申请人： Anuj B. Gosalia ,  Steve Pronovost

    发明人： Anuj B. Gosalia ,  Steve Pronovost

    IPC分类号： G06F9/46 ,  G06F15/167

    CPC分类号： G06F9/5038 ,  G06F9/30087 ,  G06F9/461 ,  G06F9/4843 ,  G06F9/5016 ,  G06F9/544 ,  G06F9/546 ,  Y02D10/22 ,  Y02D10/24

    摘要： Systems and methods are provided for scheduling the processing of a coprocessor whereby applications can submit tasks to a scheduler, and the scheduler can determine how much processing each application is entitled to as well as an order for processing. In connection with this process, tasks that require processing can be stored in physical memory or in virtual memory that is managed by a memory manager. The invention also provides various techniques of determining whether a particular task is ready for processing. A “run list” may be employed to ensure that the coprocessor does not waste time between tasks or after an interruption. The invention also provides techniques for ensuring the security of a computer system, by not allowing applications to modify portions of memory that are integral to maintaining the proper functioning of system operations.

    摘要翻译： 提供了用于调度协处理器的处理的系统和方法，由此应用可以将任务提交给调度器，并且调度器可以确定每个应用程序被处理多少处理以及处理顺序。 关于这个过程，需要处理的任务可以被存储在由存储器管理器管理的物理存储器或虚拟存储器中。 本发明还提供了确定特定任务是否准备好进行处理的各种技术。 可以使用“运行列表”来确保协处理器不会在任务之间或在中断之后浪费时间。 本发明还提供了用于确保计算机系统的安全性的技术，不允许应用修改为维持系统操作的正常功能而整体的部分存储器。

    Systems and methods for scheduling coprocessor resources in a computing system
    6.
    发明授权
    Systems and methods for scheduling coprocessor resources in a computing system 有权
    在计算系统中调度协处理器资源的系统和方法

    公开(公告)号：US07444637B2

    公开(公告)日：2008-10-28

    申请号：US10777797

    申请日：2004-02-12

    申请人： Steve Pronovost ,  Anuj B. Gosalia ,  Bryan L. Langley ,  Hideyuki Nagase

    发明人： Steve Pronovost ,  Anuj B. Gosalia ,  Bryan L. Langley ,  Hideyuki Nagase

    IPC分类号： G06F9/46 ,  G06F13/28 ,  G06F9/34 ,  G06F15/76

    CPC分类号： G06F13/30 ,  G06F9/4881 ,  G06F9/5016

    摘要： Systems and methods for scheduling coprocessing resources in a computing system are provided without redesigning the coprocessor. In various embodiments, a system of preemptive multitasking is provided achieving benefits over cooperative multitasking by any one or more of (1) executing rendering commands sent to the coprocessor in a different order than they were submitted by applications; (2) preempting the coprocessor during scheduling of non-interruptible hardware; (3) allowing user mode drivers to build work items using command buffers in a way that does not compromise security; (4) preparing DMA buffers for execution while the coprocessor is busy executing a previously prepared DMA buffer; (5) resuming interrupted DMA buffers; and (6) reducing the amount of memory needed to run translated DMA buffers.

    摘要翻译： 提供了一种用于在计算系统中调度协处理资源的系统和方法，而不重新设计协处理器。 在各种实施例中，提供了一种抢占式多任务的系统，其通过以下方式中的任何一个或多个实现协作多任务的优点：（1）以与应用提交的顺序不同的顺序执行发送到协处理器的呈现命令; （2）在调度不可中断硬件期间抢占协处理器; （3）允许用户模式驱动程序以不损害安全性的方式使用命令缓冲区构建工作项; （4）在协处理器忙于执行预先准备的DMA缓冲器时，准备执行DMA缓冲器; （5）恢复中断DMA缓冲区; 和（6）减少运行转换的DMA缓冲区所需的内存量。

    SYSTEMS AND METHODS FOR ENHANCING PERFORMANCE OF A COPROCESSOR
    7.
    发明申请
    SYSTEMS AND METHODS FOR ENHANCING PERFORMANCE OF A COPROCESSOR 有权
    用于提高共处理器性能的系统和方法

    公开(公告)号：US20080301687A1

    公开(公告)日：2008-12-04

    申请号：US12172910

    申请日：2008-07-14

    申请人： Anuj B. Gosalia ,  Steve Pronovost

    发明人： Anuj B. Gosalia ,  Steve Pronovost

    IPC分类号： G06F9/46

    CPC分类号： G06F9/5038 ,  G06F9/30087 ,  G06F9/461 ,  G06F9/4843 ,  G06F9/5016 ,  G06F9/544 ,  G06F9/546 ,  Y02D10/22 ,  Y02D10/24

    摘要： Techniques for minimizing coprocessor “starvation,” and for effectively scheduling processing in a coprocessor for greater efficiency and power. A run list is provided allowing a coprocessor to switch from one task to the next, without waiting for CPU intervention. A method called “surface faulting” allows a coprocessor to fault at the beginning of a large task rather than somewhere in the middle of the task. DMA control instructions, namely a “fence,” a “trap” and a “enable/disable context switching,” can be inserted into a processing stream to cause a coprocessor to perform tasks that enhance coprocessor efficiency and power. These instructions can also be used to build high-level synchronization objects. Finally, a “flip” technique is described that can switch a base reference for a display from one location to another, thereby changing the entire display surface.

    摘要翻译： 用于最小化协处理器“饥饿”的技术，并且用于在协处理器中有效地调度处理以获得更高的效率和功率。 提供运行列表，允许协处理器从一个任务切换到下一个任务，而不必等待CPU干预。 称为“表面故障”的方法允许协处理器在大任务开始时发生故障，而不是在任务中间的任何地方。 可以将DMA控制指令，即“围栏”，“陷阱”和“启用/禁用上下文切换”插入到处理流中，以使协处理器执行增强协处理器效率和功率的任务。 这些指令也可用于构建高级同步对象。 最后，描述了一种“翻转”技术，其可以将显示器的基准基准从一个位置切换到另一个位置，从而改变整个显示表面。

    Systems and methods for enhancing performance of a coprocessor
    8.
    发明授权
    Systems and methods for enhancing performance of a coprocessor 有权
    用于增强协处理器性能的系统和方法

    公开(公告)号：US07421694B2

    公开(公告)日：2008-09-02

    申请号：US10763778

    申请日：2004-01-22

    申请人： Anuj B. Gosalia ,  Steve Pronovost

    发明人： Anuj B. Gosalia ,  Steve Pronovost

    IPC分类号： G06F9/46 ,  G06F12/00

    CPC分类号： G06F9/4843 ,  G06F9/4881 ,  G06F9/5016 ,  Y02D10/22 ,  Y02D10/24

    摘要： Techniques for minimizing coprocessor “starvation,” and for effectively scheduling processing in a coprocessor for greater efficiency and power. A run list is provided allowing a coprocessor to switch from one task to the next, without waiting for CPU intervention. A method called “surface faulting” allows a coprocessor to fault at the beginning of a large task rather than somewhere in the middle of the task. DMA control instructions, namely a “fence,” a “trap” and a “enable/disable context switching,” can be inserted into a processing stream to cause a coprocessor to perform tasks that enhance coprocessor efficiency and power. These instructions can also be used to build high-level synchronization objects. Finally, a “flip” technique is described that can switch a base reference for a display from one location to another, thereby changing the entire display surface.

    摘要翻译： 用于最小化协处理器“饥饿”的技术，并且用于在协处理器中有效地调度处理以获得更高的效率和功率。 提供运行列表，允许协处理器从一个任务切换到下一个任务，而不必等待CPU干预。 称为“表面故障”的方法允许协处理器在大任务开始时发生故障，而不是在任务中间的任何地方。 可以将DMA控制指令，即“围栏”，“陷阱”和“启用/禁用上下文切换”插入到处理流中，以使协处理器执行增强协处理器效率和功率的任务。 这些指令也可用于构建高级同步对象。 最后，描述了一种“翻转”技术，其可以将显示器的基准基准从一个位置切换到另一个位置，从而改变整个显示表面。

    Methods and system for general skinning via hardware accelerators
    9.
    发明授权
    Methods and system for general skinning via hardware accelerators 有权
    通过硬件加速器进行一般剥皮的方法和系统

    公开(公告)号：US07088367B2

    公开(公告)日：2006-08-08

    申请号：US10994867

    申请日：2004-11-22

    申请人： Charles N. Boyd ,  David John Martin ,  Anuj B. Gosalia ,  David Floyd Aronson

    发明人： Charles N. Boyd ,  David John Martin ,  Anuj B. Gosalia ,  David Floyd Aronson

    IPC分类号： G06T15/00

    CPC分类号： G06T13/40

    摘要： Complex computer graphics forms and motions can be constructed either by hand or with motion or geometry capture technologies, once they are created, they are difficult to modify, particularly at runtime. Interpolation provides a way to leverage artist-generated source material. Methodologies for efficient runtime interpolation between multiple forms or multiple motion segments enables computers to perform more realistic animation in real-time. Shape interpolation is applied to predefined figures to create smoothly skinned figures that deform in natural ways. Predefined figures are selected using a search technique that reduces the amount of interpolation required to produce real-time animation.

    摘要翻译： 复杂的计算机图形形式和运动可以手动或运动或几何捕获技术构建，一旦创建，它们很难修改，特别是在运行时。 插值提供了一种利用艺术家生成的素材的方法。 用于多个表单或多个运动段之间高效运行时插值的方法使计算机能够实时执行更逼真的动画。 形状插值应用于预定义的图形，以创建平滑的皮肤图形，以自然的方式变形。 使用减少产生实时动画所需的插值量的搜索技术来选择预定义的数字。