摘要:
An integrated circuit includes an output terminal to be coupled to a light-emitting diode, an output circuit coupled to the output terminal, the output circuit being configured to supply an operating signal to the light-emitting diode, a measuring circuit coupled to the output terminal and a control circuit coupled to the measuring circuit. The measuring circuit is configured to sense on the output terminal a signal value outside an operating regime of the light-emitting diode, the signal value being a voltage below a forward voltage of the light-emitting diode or a current below a threshold current of the light-emitting diode. The control circuit is configured to configure at least one function of the integrated circuit when the signal value as sensed by the measuring circuit corresponds to a voltage below the forward voltage of the light-emitting diode or a current below the threshold current of the light-emitting diode.
摘要:
A line driver which is especially suitable for wirebound data transmission at high bit rates, comprising several parallel-connected driver stages (3) respectively comprising a first pair of transistors consisting of two transistors (4, 5) which are controlled in a differential manner according to digital data to be transmitted, and a second pair of transistors (4, 5). The transistors belonging to the second pair of transistors (6, 7) are series-connected to a corresponding transistor (4, 5) of the first pair of transistors. The individual driver stages (3) are connected by the transistors (6, 7) of the second pair of transistors in a parallel manner to both the terminals of the line driver. Each driver stage (3) is associated with a control circuit (2) with transfer gates (14, 15), producing the differential control signals (VGA, VGB) for the two transistors (4, 5) of the corresponding first pair of transistors.
摘要翻译:一种线驱动器,特别适用于高比特率的线数据传输,包括几个并联连接的驱动器级(3),分别包括由两个晶体管组成的第一对晶体管,两个晶体管以差分方式被控制, 到要发送的数字数据,以及第二对晶体管(4,5)。 属于第二对晶体管(6,7)的晶体管串联连接到第一对晶体管对应的晶体管(4,5)。 各个驱动器级(3)通过第二对晶体管的晶体管(6,7)以与线驱动器的两端并联的方式连接。 每个驱动器级(3)与具有传输门(14,15)的控制电路(2)相关联,产生差分控制信号(VG SUB,VG B B) 对于相应的第一对晶体管的两个晶体管(4,5)。
摘要:
A line driver (3) for transmitting data with high bit rates, in particular for wire-bound data transmission in the full-duplex process, comprises a differential pair with differential pair transistors (14, 15) for generating transmission impulses as a function of the data to be transmitted, whereby the transmission impulses are preferably output via cascode transistors (16, 17), each with the differential pair transistors (14, 15) forming a cascode circuit, onto the data transmission line (8, 9) connected to the line driver (3). For reproducing the behaviour of the differential pair a replica differential pair with replica differential pair transistors (18, 19) is provided, generating replica impulses corresponding to the transmission impulses, which replica impulses can be fed via replica cascode transistors (20, 21) to a hybrid integrated circuit (6) for effecting echo compensation in relation to impulses received via the data transmission line (8, 9)
摘要:
An integrated circuit comprises an output terminal to be coupled to a non-linear circuit element, an output circuit coupled to the output terminal, the output circuit being configured to supply an operating signal to the non-linear circuit element, a measuring circuit coupled to the output terminal, the measuring circuit being configured to sense on the output terminal a signal value outside an operating regime of the non-linear circuit element, and a control circuit coupled to the measuring circuit, the control circuit being configured to configure at least one function of the integrated circuit on the basis of the signal value sensed by the measuring circuit.
摘要:
A line driver (3) for transmitting data with high bit rates, in particular for wire-bound data transmission in the full-duplex process, comprises a differential pair with differential pair transistors (14, 15) for generating transmission impulses as a function of the data to be transmitted, whereby the transmission impulses are preferably output via cascode transistors (16, 17), each with the differential pair transistors (14, 15) forming a cascode circuit, onto the data transmission line (8, 9) connected to the line driver (3). For reproducing the behaviour of the differential pair a replica differential pair with replica differential pair transistors (18, 19) is provided, generating replica impulses corresponding to the transmission impulses, which replica impulses can be fed via replica cascode transistors (20, 21) to a hybrid integrated circuit (6) for effecting echo compensation in relation to impulses received via the data transmission line (8, 9)
摘要:
In an embodiment, a circuit is disclosed comprising a circuit portion coupled to a terminal and a calibration circuit portion coupled to said terminal.
摘要:
In an embodiment, a circuit is disclosed comprising a circuit portion coupled to a terminal and a calibration circuit portion coupled to said terminal.
摘要:
The invention relates to a transmitter for transmission of digital data via a transmission line (10), comprising a current-driving digital/analogue converter (1) which is arranged at the input of the transmitter; a current-operated form filter (2) for forming the current pulses which are supplied from the digital/analogue converter; a line driver (5) which carries out current/voltage conversion; and a circuit for offset compensation (6), which is arranged in a feedback path (11). In order to improve the quality of the pulses which are transmitted at the output of the transmitter, the invention proposes that the internal signal processing of the transmitter be carried out on a current basis.
摘要:
Disturbances in bipolar signals transmitted on a transmission line are suppressed by adjusting the amplitude of the signals with coarse adjustment steps and with fine adjustment steps. The amplitude adjusted signals are compared to at least a lower reference level and an upper reference level for determining a first percentage of the amplitude adjusted signals violating the lower reference level and a second percentage of the amplitude adjusted signals violating the upper reference level. The coarse adjustment steps and the fine adjustment steps are selected in accordance with an adjustment characteristic which evaluates at least the first percentage and the second percentage. The adjustment characteristic is changed if a tendency of reference level violation of the amplitude adjusted signals is detected and a check is performed if the step of changing the adjustment characteristic improves the disturbance suppression. A device for suppressing disturbances is also provided.
摘要:
The MOS circuit configuration allows switching high voltages on a semiconductor chip. In order to switch a high negative voltage, for example as a programming voltage on the word line of a flash-memory, two circuit variants are given which are formed only with transistors of the same conductivity type as the substrate. The substrate and the transistors formed in the well are p-conductive. In this way it is possible to dispense with deep insulating wells which require special technology.