Integrated Circuit and Method of Configuring an Integrated Circuit
    2.
    发明申请
    Integrated Circuit and Method of Configuring an Integrated Circuit 有权
    集成电路和组态集成电路的方法

    公开(公告)号:US20090267681A1

    公开(公告)日:2009-10-29

    申请号:US12107802

    申请日:2008-04-23

    CPC classification number: H05B33/0818 H05B33/0857

    Abstract: An integrated circuit comprises an output terminal to be coupled to a non-linear circuit element, an output circuit coupled to the output terminal, the output circuit being configured to supply an operating signal to the non-linear circuit element, a measuring circuit coupled to the output terminal, the measuring circuit being configured to sense on the output terminal a signal value outside an operating regime of the non-linear circuit element, and a control circuit coupled to the measuring circuit, the control circuit being configured to configure at least one function of the integrated circuit on the basis of the signal value sensed by the measuring circuit.

    Abstract translation: 集成电路包括要耦合到非线性电路元件的输出端子,耦合到输出端子的输出电路,输出电路被配置为向非线性电路元件提供工作信号,测量电路耦合到 所述输出端子,所述测量电路被配置为在所述输出端子上感测所述非线性电路元件的操作状态之外的信号值,以及耦合到所述测量电路的控制电路,所述控制电路被配置为配置至少一个 基于由测量电路感测的信号值的集成电路的功能。

    Methods and apparatus for improved memory access
    5.
    发明申请
    Methods and apparatus for improved memory access 有权
    用于改善内存访问的方法和设备

    公开(公告)号:US20070237009A1

    公开(公告)日:2007-10-11

    申请号:US11806012

    申请日:2007-05-29

    Abstract: A memory access scheme employing one or more sets of shift registers interconnected in series to which data may be loaded from or written into one or more memory devices. That is, data from the memory devices may be parallel loaded into the sets of shift registers and then serially shifted through the shift registers until it is output from the sets of shift registers and transferred to its destination. Additionally, the data may be read from and loaded into the memory devices to/from the sets of shift registers such that the shifting of the shift registers is uninterrupted during the reading and/or loading of data. Additionally, data from the memory devices may be loaded into two or more parallel chains of shift registers and then serially shifted through the shift register chains.

    Abstract translation: 一种存储器访问方案,其采用串联互连的一组或多组移位寄存器,数据可以从其中加载或写入一个或多个存储器件。 也就是说,来自存储器件的数据可以并行加载到移位寄存器组中,然后通过移位寄存器串行移位,直到从移位寄存器组输出并传送到其目的地。 此外,数据可以从/从该组移位寄存器读取并加载到存储器件中,使得在读取和/或加载数据期间移位寄存器的移位不间断。 此外,来自存储器件的数据可以被加载到两个或更多个并行的移位寄存器链中,然后通过移位寄存器链串行移位。

    Methods and systems for a storage system
    6.
    发明申请
    Methods and systems for a storage system 失效
    存储系统的方法和系统

    公开(公告)号:US20070174646A1

    公开(公告)日:2007-07-26

    申请号:US11710407

    申请日:2007-02-26

    CPC classification number: H04L41/0663 H04L41/0816 H04L43/0811 H04L67/1097

    Abstract: A storage system that may include one or more memory sections, one or more switches, and a management system. The memory sections include memory devices and a section controller capable of detecting faults with the memory section and transmitting messages to the management system regarding detected faults. The storage system may include a management system capable of receiving fault messages from the section controllers and removing from service the faulty memory sections. Additionally, the management system may determine routing algorithms for the one or more switches.

    Abstract translation: 可以包括一个或多个存储器部分,一个或多个交换机和管理系统的存储系统。 存储器部分包括存储器件和能够利用存储器部分检测故障并且向管理系统发送关于检测到的故障的消息的部件控制器。 存储系统可以包括管理系统,其能够从部分控制器接收故障消息并从服务中去除故障存储器部分。 另外,管理系统可以确定一个或多个交换机的路由算法。

    Methods and apparatus for improved memory access
    7.
    发明申请
    Methods and apparatus for improved memory access 有权
    用于改善内存访问的方法和设备

    公开(公告)号:US20050128823A1

    公开(公告)日:2005-06-16

    申请号:US11030881

    申请日:2005-01-10

    Abstract: A memory access scheme employing one or more sets of shift registers interconnected in series to which data may be loaded from or written into one or more memory devices. That is, data from the memory devices may be parallel loaded into the sets of shift registers and then serially shifted through the shift registers until it is output from the sets of shift registers and transferred to its destination. Additionally, the data may be read from and loaded into the memory devices to/from the sets of shift registers such that the shifting of the shift registers is uninterrupted during the reading and/or loading of data. Additionally, data from the memory devices may be loaded into two or more parallel chains of shift registers and then serially shifted through the shift register chains.

    Abstract translation: 一种存储器访问方案,其采用串联互连的一组或多组移位寄存器,数据可以从其中加载或写入一个或多个存储器件。 也就是说,来自存储器件的数据可以并行加载到移位寄存器组中,然后通过移位寄存器串行移位,直到从移位寄存器组输出并传送到其目的地。 此外,数据可以从/从该组移位寄存器读取并加载到存储器件中,使得在读取和/或加载数据期间移位寄存器的移位不间断。 此外,来自存储器件的数据可以被加载到两个或更多个并行的移位寄存器链中,然后通过移位寄存器链串行移位。

    Integrated circuit (IC) with reconfigurable digital voltage regulator fabric
    8.
    发明授权
    Integrated circuit (IC) with reconfigurable digital voltage regulator fabric 有权
    集成电路(IC)与可重新配置的数字电压调节器结构

    公开(公告)号:US09529765B2

    公开(公告)日:2016-12-27

    申请号:US14313817

    申请日:2014-06-24

    CPC classification number: G06F13/4221 G06F1/26 G06F13/4027

    Abstract: Described is an apparatus which comprises: a plurality of bridges which are operable to drive respective signals for one or more power supply rails; a plurality of controllers; and a main controller to couple one or more controllers from the plurality of controllers to one or more bridges from the plurality of bridges.

    Abstract translation: 描述了一种装置,其包括:多个桥,其可操作以驱动用于一个或多个电源轨的相应信号; 多个控制器; 以及主控制器,用于将来自所述多个控制器的一个或多个控制器耦合到来自所述多个桥的一个或多个桥。

    Integrated circuit with a measuring circuit and method of configuring an integrated circuit with a measuring circuit
    9.
    发明授权
    Integrated circuit with a measuring circuit and method of configuring an integrated circuit with a measuring circuit 有权
    具有测量电路的集成电路和用测量电路配置集成电路的方法

    公开(公告)号:US07816907B2

    公开(公告)日:2010-10-19

    申请号:US12107802

    申请日:2008-04-23

    CPC classification number: H05B33/0818 H05B33/0857

    Abstract: An integrated circuit includes an output terminal to be coupled to a light-emitting diode, an output circuit coupled to the output terminal, the output circuit being configured to supply an operating signal to the light-emitting diode, a measuring circuit coupled to the output terminal and a control circuit coupled to the measuring circuit. The measuring circuit is configured to sense on the output terminal a signal value outside an operating regime of the light-emitting diode, the signal value being a voltage below a forward voltage of the light-emitting diode or a current below a threshold current of the light-emitting diode. The control circuit is configured to configure at least one function of the integrated circuit when the signal value as sensed by the measuring circuit corresponds to a voltage below the forward voltage of the light-emitting diode or a current below the threshold current of the light-emitting diode.

    Abstract translation: 集成电路包括要耦合到发光二极管的输出端子,耦合到输出端子的输出电路,输出电路被配置为向发光二极管提供工作信号,测量电路耦合到输出端 端子和耦合到测量电路的控制电路。 测量电路被配置为在输出端子上感测在发光二极管的工作状态之外的信号值,该信号值是低于发光二极管的正向电压的电压或低于该发光二极管的正向电压的电流 发光二极管。 控制电路被配置为当由测量电路感测到的信号值对应于低于发光二极管的正向电压的电压或低于发光二极管的阈值电流的电流时,配置集成电路的至少一个功能。 发光二极管。

    RECONFIGURABLE DIGITAL VOLTAGE REGULATOR FABRIC
    10.
    发明申请
    RECONFIGURABLE DIGITAL VOLTAGE REGULATOR FABRIC 有权
    可重复数字电压调节器织物

    公开(公告)号:US20150370298A1

    公开(公告)日:2015-12-24

    申请号:US14313817

    申请日:2014-06-24

    CPC classification number: G06F13/4221 G06F1/26 G06F13/4027

    Abstract: Described is an apparatus which comprises: a plurality of bridges which are operable to drive respective signals for one or more power supply rails; a plurality of controllers; and a main controller to couple one or more controllers from the plurality of controllers to one or more bridges from the plurality of bridges.

    Abstract translation: 描述了一种装置,其包括:多个桥,其可操作以驱动用于一个或多个电源轨的相应信号; 多个控制器; 以及主控制器,用于将来自所述多个控制器的一个或多个控制器耦合到来自所述多个桥的一个或多个桥。

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