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公开(公告)号：US20130257564A1
公开(公告)日：2013-10-03
申请号：US13437047
申请日：2012-04-02
Applicant: Bo-Jr HUANG , Yi-Wei CHEN , Kuan-Yu LIN , Chin-Chou LIU
Inventor： Bo-Jr HUANG , Yi-Wei CHEN , Kuan-Yu LIN , Chin-Chou LIU
IPC: H03H7/01
CPC classification number: H01L23/49822 , H01F2017/0086 , H01L23/147 , H01L23/49827 , H01L25/0652 , H01L25/18 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2924/13091 , H01L2924/1421 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2924/16172 , H01L2924/19105 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H03H7/0115 , H03H2001/0085 , H01L2924/014 , H01L2924/00
Abstract: An interposer element in a multidimensional integrated circuit with stacked elements has one or more conductors, especially power supply lines, coupled through decoupling networks defining low impedance shunts for high frequency signals to ground. The interposer has successive tiers including silicon, metal and dielectric deposition layers. The decoupling network for a conductor has at least one and preferably two reactive transmission lines. A transmission line has an inductor in series with the conductor and parallel capacitances at the inductor terminals. The inductors are formed by traces in spaced metal deposition layers forming coil windings and through vias connecting between layers to permit conductor crossovers. The capacitances are formed by MOScaps in the interposer layers. An embodiment has serially coupled coils with capacitances at the input, output and junction between the coils, wherein the coils are magnetically coupled to form a transformer.
Abstract translation: 具有堆叠元件的多维集成电路中的插入元件具有一个或多个导体，特别是电源线，其通过去耦网络耦合，所述解耦网络限定用于将高频信号接地的低阻抗分流。 插入器具有连续的层，包括硅，金属和介电沉积层。 用于导体的去耦网络具有至少一个且优选两个无功传输线。 传输线具有与导体串联的电感器和电感器端子处的并联电容。 电感器由形成线圈绕组的间隔开的金属沉积层中的迹线形成，并且通过在层之间连接的通孔以允许导体交叉。 电容由插入层中的MOS框形成。 实施例具有在线圈之间的输入，输出和结点处具有电容的串联耦合线圈，其中线圈被磁耦合以形成变压器。
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公开(公告)号：US20110181990A1
公开(公告)日：2011-07-28
申请号：US12795429
申请日：2010-06-07
Applicant: Bo-Jr Huang , Huei Wang
Inventor： Bo-Jr Huang , Huei Wang
IPC: H02H9/04
CPC classification number: H02H9/046
Abstract: The present invention relates to an electrostatic discharge (ESD) protection circuit, and more particularly to a band-pass structure electrostatic discharge protection circuit. An ESD protection circuit is disposed at the input of a radio frequency (RF) core circuit. The ESD protection circuit comprises a plurality of diodes and inductors constructing a plurality of discharging paths, wherein the diodes and inductors forms a band-pass filter structure. Such that, the RF core circuit with the ESD protection circuit of the present invention feature much higher ESD robustness and better RF performance than the conventional design.
Abstract translation: 本发明涉及静电放电（ESD）保护电路，更具体地说，涉及一种带通结构的静电放电保护电路。 ESD保护电路设置在射频（RF）核心电路的输入端。 ESD保护电路包括构成多个放电路径的多个二极管和电感器，其中二极管和电感器形成带通滤波器结构。 因此，具有本发明的ESD保护电路的RF核心电路具有比常规设计更高的ESD鲁棒性和更好的RF性能。
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公开(公告)号：US20110211285A1
公开(公告)日：2011-09-01
申请号：US12795386
申请日：2010-06-07
Applicant: Bo-Jr HUANG , Huei Wang
Inventor： Bo-Jr HUANG , Huei Wang
IPC: H02H9/04
CPC classification number: H02H9/046
Abstract: The present invention relates to an electrostatic discharge (ESD) protection circuit, and more particularly to a low parasitic capacitance electrostatic discharge protection circuit. An ESD protection circuit is established with the structure in accordance with the present invention comprising a plurality of discharging paths. The ESD protection circuit is connected to the input/output pad of a radio frequency (RF) core circuit. Such that, the RF core circuit with the ESD protection circuit of the present invention feature much higher ESD robustness. And the parasitic capacitance of the ESD protection is reduced because of the structure of the present invention.
Abstract translation: 本发明涉及一种静电放电（ESD）保护电路，特别涉及一种低寄生电容静电放电保护电路。 建立了ESD保护电路，其结构包括多个放电路径。 ESD保护电路连接到射频（RF）核心电路的输入/输出焊盘。 因此，具有本发明的ESD保护电路的RF核心电路具有高得多的ESD鲁棒性。 并且由于本发明的结构，ESD保护的寄生电容减小。
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公开(公告)号：US08040188B2
公开(公告)日：2011-10-18
申请号：US12457927
申请日：2009-06-25
Applicant: Bo-Jr Huang , Huei Wang
Inventor： Bo-Jr Huang , Huei Wang
IPC: H03F1/22
CPC classification number: H03F1/223 , H03F1/26 , H03F2200/294 , H03F2200/61
Abstract: The present invention relates to a low noise cascode amplifier comprising a first transistor, a second transistor, a third transistor, a first inductor, and a second inductor. Furthermore, the first transistor can connect with the second transistor via the first inductor, and the second transistor can connect with the third transistor via the second inductor; thereby, a cascode device can be formed. The inductor and the parasitic capacitances can resonate at high frequency, so that the noise figure of the cascode amplifier can be reduced.
Abstract translation: 本发明涉及一种低噪声共源共栅放大器，包括第一晶体管，第二晶体管，第三晶体管，第一电感器和第二电感器。 此外，第一晶体管可以经由第一电感器与第二晶体管连接，并且第二晶体管可以经由第二电感器与第三晶体管连接; 从而可以形成共源共栅装置。 电感和寄生电容可以在高频下共振，从而降低共源共栅放大器的噪声系数。
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公开(公告)号：US20100264988A1
公开(公告)日：2010-10-21
申请号：US12457927
申请日：2009-06-25
Applicant: Bo-Jr Huang , Huei Wang
Inventor： Bo-Jr Huang , Huei Wang
CPC classification number: H03F1/223 , H03F1/26 , H03F2200/294 , H03F2200/61
Abstract: The present invention relates to a low noise cascode amplifier comprising a first transistor, a second transistor, a third transistor, a first inductor, and a second inductor. Furthermore, the first transistor can connect with the second transistor via the first inductor, and the second transistor can connect with the third transistor via the second inductor; thereby, a cascode device can be formed. The inductor and the parasitic capacitances can resonate at high frequency, so that the noise figure of the cascode amplifier can be reduced.
Abstract translation: 本发明涉及一种包括第一晶体管，第二晶体管，第三晶体管，第一电感器和第二电感器的低噪声共源共栅放大器。 此外，第一晶体管可以通过第一电感器与第二晶体管连接，并且第二晶体管可以经由第二电感器与第三晶体管连接; 从而可以形成共源共栅装置。 电感和寄生电容可以在高频下共振，从而降低共源共栅放大器的噪声系数。
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Patent Agency Ranking
公开(公告)号：US09391010B2
公开(公告)日：2016-07-12
申请号：US13437047
申请日：2012-04-02
Applicant: Bo-Jr Huang , Yi-Wei Chen , Kuan-Yu Lin , Chin-Chou Liu
Inventor： Bo-Jr Huang , Yi-Wei Chen , Kuan-Yu Lin , Chin-Chou Liu
IPC: H03H7/01 , H01L23/498 , H01L23/14 , H03H1/00 , H01L25/065 , H01L25/18 , H01F17/00
CPC classification number: H01L23/49822 , H01F2017/0086 , H01L23/147 , H01L23/49827 , H01L25/0652 , H01L25/18 , H01L2224/131 , H01L2224/16145 , H01L2224/16225 , H01L2225/06513 , H01L2225/06517 , H01L2225/06541 , H01L2225/06548 , H01L2924/13091 , H01L2924/1421 , H01L2924/1431 , H01L2924/1434 , H01L2924/15311 , H01L2924/16172 , H01L2924/19105 , H01L2924/30105 , H01L2924/30107 , H01L2924/3011 , H03H7/0115 , H03H2001/0085 , H01L2924/014 , H01L2924/00
Abstract: An interposer element in a multidimensional integrated circuit with stacked elements has one or more conductors, especially power supply lines, coupled through decoupling networks defining low impedance shunts for high frequency signals to ground. The interposer has successive tiers including silicon, metal and dielectric deposition layers. The decoupling network for a conductor has at least one and preferably two reactive transmission lines. A transmission line has an inductor in series with the conductor and parallel capacitances at the inductor terminals. The inductors are formed by traces in spaced metal deposition layers forming coil windings and through vias connecting between layers to permit conductor crossovers. The capacitances are formed by MOScaps in the interposer layers. An embodiment has serially coupled coils with capacitances at the input, output and junction between the coils, wherein the coils are magnetically coupled to form a transformer.
Abstract translation: 具有堆叠元件的多维集成电路中的插入元件具有一个或多个导体，特别是电源线，其通过去耦网络耦合，所述解耦网限定用于将高频信号接地的低阻抗分流。 插入器具有连续的层，包括硅，金属和介电沉积层。 用于导体的去耦网络具有至少一个且优选两个无功传输线。 传输线具有与导体串联的电感器和电感器端子处的并联电容。 电感器由形成线圈绕组的间隔开的金属沉积层中的迹线形成，并且通过在层之间连接的通孔以允许导体交叉。 电容由插入层中的MOS框形成。 实施例具有在线圈之间的输入，输出和结点处具有电容的串联耦合线圈，其中线圈被磁耦合以形成变压器。
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公开(公告)号：US08305718B2
公开(公告)日：2012-11-06
申请号：US12795386
申请日：2010-06-07
Applicant: Bo-Jr Huang , Huei Wang
Inventor： Bo-Jr Huang , Huei Wang
CPC classification number: H02H9/046
Abstract: The present invention relates to an electrostatic discharge (ESD) protection circuit, and more particularly to a low parasitic capacitance electrostatic discharge protection circuit. An ESD protection circuit is established with the structure in accordance with the present invention comprising a plurality of discharging paths. The ESD protection circuit is connected to the input/output pad of a radio frequency (RF) core circuit. Such that, the RF core circuit with the ESD protection circuit of the present invention feature much higher ESD robustness. And the parasitic capacitance of the ESD protection is reduced because of the structure of the present invention.
Abstract translation: 本发明涉及一种静电放电（ESD）保护电路，特别涉及一种低寄生电容静电放电保护电路。 建立了ESD保护电路，其结构包括多个放电路径。 ESD保护电路连接到射频（RF）核心电路的输入/输出焊盘。 因此，具有本发明的ESD保护电路的RF核心电路具有高得多的ESD鲁棒性。 并且由于本发明的结构，ESD保护的寄生电容减小。
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公开(公告)号：US07952845B2
公开(公告)日：2011-05-31
申请号：US12611300
申请日：2009-11-03
Applicant: Bo-Jr Huang , Huei Wang
Inventor： Bo-Jr Huang , Huei Wang
IPC: H02H9/00
CPC classification number: H03F1/52 , H03F3/195 , H03F2200/294 , H03F2200/444 , H03F2200/451
Abstract: A V-band radio frequency (RF) electrostatic discharge (ESD) protection circuit uses meander inductors and diodes connecting in series to provide ESD protection. When operated in low frequency, the static electricity input from a RF pad may discharge to ground or to a voltage VDD through the meander inductor and the diode, so that a core circuit is not damaged by ESD. When operated in high frequency, the high frequency stray effect of the core circuit is substantially reduced due to impedance isolation generated by the meander inductors. Therefore, a low-noised amplifier (LNA) can receive an accurate high frequency input signal.
Abstract translation: V型射频（RF）静电放电（ESD）保护电路使用串联的迂回电感和二极管来提供ESD保护。 当低频工作时，从RF焊盘输入的静电可以通过曲折电感器和二极管放电到地或电压VDD，使得核心电路不会被ESD损坏。 当以高频率操作时，由于曲折电感器产生的阻抗隔离，核心电路的高频杂散效应显着降低。 因此，低噪声放大器（LNA）可以接收精确的高频输入信号。
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公开(公告)号：US20100277840A1
公开(公告)日：2010-11-04
申请号：US12611300
申请日：2009-11-03
Applicant: Bo-Jr Huang , Huei Wang
Inventor： Bo-Jr Huang , Huei Wang
IPC: H02H9/00
CPC classification number: H03F1/52 , H03F3/195 , H03F2200/294 , H03F2200/444 , H03F2200/451
Abstract: A V-band radio frequency (RF) electrostatic discharge (ESD) protection circuit uses meander inductors and diodes connecting in series to provide ESD protection. When operated in low frequency, the static electricity input from a RF pad may discharge to ground or to a voltage VDD through the meander inductor and the diode, so that a core circuit does not be damaged by ESD. When operated in high frequency, the high frequency stray effect of the core circuit is substantially reduced due to impedance isolation generated by the meander inductors. Therefore, a low-noised amplifier (LNA) can receive an accurate high frequency input signal.
Abstract translation: V型射频（RF）静电放电（ESD）保护电路使用串联的迂回电感和二极管来提供ESD保护。 当低频工作时，从RF焊盘输入的静电可以通过曲折电感器和二极管放电到地或电压VDD，使得核心电路不会被ESD损坏。 当以高频率操作时，由于曲折电感器产生的阻抗隔离，核心电路的高频杂散效应显着降低。 因此，低噪声放大器（LNA）可以接收精确的高频输入信号。
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公开(公告)号：US08482889B2
公开(公告)日：2013-07-09
申请号：US12795429
申请日：2010-06-07
Applicant: Bo-Jr Huang , Huei Wang
Inventor： Bo-Jr Huang , Huei Wang
CPC classification number: H02H9/046
Abstract: The present invention relates to an electrostatic discharge (ESD) protection circuit, and more particularly to a band-pass structure electrostatic discharge protection circuit. An ESD protection circuit is disposed at the input of a radio frequency (RF) core circuit. The ESD protection circuit comprises a plurality of diodes and inductors constructing a plurality of discharging paths, wherein the diodes and inductors forms a band-pass filter structure. Such that, the RF core circuit with the ESD protection circuit of the present invention feature much higher ESD robustness and better RF performance than the conventional design.
Abstract translation: 本发明涉及静电放电（ESD）保护电路，更具体地说，涉及一种带通结构的静电放电保护电路。 ESD保护电路设置在射频（RF）核心电路的输入端。 ESD保护电路包括构成多个放电路径的多个二极管和电感器，其中二极管和电感器形成带通滤波器结构。 因此，具有本发明的ESD保护电路的RF核心电路具有比常规设计更高的ESD鲁棒性和更好的RF性能。
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