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    Memory Devices Including Blocking Layers
    3.
    发明申请
    Memory Devices Including Blocking Layers 审中-公开
    包含封锁层的内存设备

    公开(公告)号：US20160343725A1

    公开(公告)日：2016-11-24

    申请号：US15042799

    申请日：2016-02-12

    申请人： Won Seok JUNG ,  Brad H. LEE ,  Sang Woo JIN

    发明人： Won Seok JUNG ,  Brad H. LEE ,  Sang Woo JIN

    IPC分类号： H01L27/115 ,  H01L29/423

    CPC分类号： H01L27/11573 ,  H01L27/1157 ,  H01L27/11575 ,  H01L27/11582

    摘要： A memory device includes a cell region and a peripheral circuit region adjacent the cell region. A plurality of gate electrode layers and insulating layers are stacked on the substrate in the cell region, and a plurality of circuit devices are in the peripheral circuit region. A first interlayer insulating layer is on the substrate in the peripheral circuit region and covers the plurality of circuit devices, and a second interlayer insulating layer is on the substrate in the cell region and the peripheral circuit region. A blocking layer is on the plurality of circuit devices between the first and second interlayer insulating layers. The blocking layer is on an upper surface, of the first interlayer insulating layer, and a side surface of the blocking layer is covered by the second interlayer insulating layer.

    摘要翻译： 存储器件包括与单元区域相邻的单元区域和外围电路区域。 多个栅电极层和绝缘层层叠在单元区域的基板上，多个电路装置在外围电路区域中。 第一层间绝缘层位于外围电路区域的基板上并覆盖多个电路器件，第二层间绝缘层位于单元区域和外围电路区域的基板上。 阻挡层位于第一和第二层间绝缘层之间的多个电路器件上。 阻挡层在第一层间绝缘层的上表面上，阻挡层的侧表面被第二层间绝缘层覆盖。

    Methods for optimizing a plasma process
    4.
    发明授权
    Methods for optimizing a plasma process 有权
    优化等离子体工艺的方法

    公开(公告)号：US08741164B2

    公开(公告)日：2014-06-03

    申请号：US13599155

    申请日：2012-08-30

    申请人： Sangwuk Park ,  Kye Hyun Baek ,  Kyoungsub Shin ,  Brad H. Lee

    发明人： Sangwuk Park ,  Kye Hyun Baek ,  Kyoungsub Shin ,  Brad H. Lee

    IPC分类号： G01L21/30 ,  G01R31/00

    CPC分类号： H01J37/32972 ,  H01J37/32862

    摘要： Methods for optimizing a plasma process are provided. The method may include obtaining a measurement spectrum from a plasma reaction in a chamber, calculating a normalized measurement standard and a normalized measurement spectrum of the measurement spectrum, comparing the normalized measurement spectrum with a normalized reference spectrum, and comparing the normalized measurement standard with a normalized reference standard to determine whether to change a process parameter of the plasma process or clean the chamber when the normalized measurement spectrum and the normalized reference spectrum are mismatched.

    摘要翻译： 提供了优化等离子体工艺的方法。 该方法可以包括从腔室中的等离子体反应获得测量光谱，计算归一化测量标准和测量光谱的归一化测量光谱，将标准化测量光谱与归一化参考光谱进行比较，并将归一化测量标准与 标准化参考标准，以确定是否改变等离子体工艺的工艺参数或在标准化测量光谱和归一化参考光谱不匹配时清洁室。

    METHODS FOR OPTIMIZING A PLASMA PROCESS
    5.
    发明申请
    METHODS FOR OPTIMIZING A PLASMA PROCESS 有权
    优化等离子体方法的方法

    公开(公告)号：US20130052757A1

    公开(公告)日：2013-02-28

    申请号：US13599155

    申请日：2012-08-30

    申请人： Sangwuk Park ,  Kye Hyun Baek ,  Kyoungsub Shin ,  Brad H. Lee

    发明人： Sangwuk Park ,  Kye Hyun Baek ,  Kyoungsub Shin ,  Brad H. Lee

    IPC分类号： H01L21/66 ,  H01L21/3065 ,  B08B7/00 ,  H01L21/205

    CPC分类号： H01J37/32972 ,  H01J37/32862

    摘要： Methods for optimizing a plasma process are provided. The method may include obtaining a measurement spectrum from a plasma reaction in a chamber, calculating a normalized measurement standard and a normalized measurement spectrum of the measurement spectrum, comparing the normalized measurement spectrum with a normalized reference spectrum, and comparing the normalized measurement standard with a normalized reference standard to determine whether to change a process parameter of the plasma process or clean the chamber when the normalized measurement spectrum and the normalized reference spectrum are mismatched.

    摘要翻译： 提供了优化等离子体工艺的方法。 该方法可以包括从腔室中的等离子体反应获得测量光谱，计算归一化测量标准和测量光谱的归一化测量光谱，将标准化测量光谱与归一化参考光谱进行比较，并将归一化测量标准与 标准化参考标准，以确定是否改变等离子体工艺的工艺参数或在标准化测量光谱和归一化参考光谱不匹配时清洁室。