公开(公告)号：US08009420B1

公开(公告)日：2011-08-30

申请号：US12571282

申请日：2009-09-30

Applicant: Robert J. Hill ,  Gary L. Heinz ,  Dwayne D. Komush ,  Bryan J. Chen ,  James D. Phillips ,  Eric P. Wentzel

Inventor： Robert J. Hill ,  Gary L. Heinz ,  Dwayne D. Komush ,  Bryan J. Chen ,  James D. Phillips ,  Eric P. Wentzel

IPC: G06F1/20 ,  H05K7/20

CPC classification number: H05K7/20509 ,  G06F1/20 ,  G06F1/32 ,  G06F1/3243 ,  Y02D10/152

Abstract: A processing module may be provided. The processing module may include a mounting member configured to structurally support a first processing unit and receive thermal energy from the first processing unit through a coupling side of the first processing unit by conduction. The processing module may also include a base member coupled to the mounting member. The base member may be configured to receive thermal energy from the mounting member. A thermal conductivity of at least one of the mounting member and the base member may be greater than about 50 Watts/meter Celsius (W/m-C). Coefficients of thermal expansion (CTEs) of the mounting member, the base member, and the coupling side of the first processing unit may be matched.

Abstract translation: 可以提供处理模块。 处理模块可以包括安装构件，其构造成结构上支撑第一处理单元并且通过传导通过第一处理单元的耦合侧从第一处理单元接收热能。 处理模块还可以包括联接到安装构件的基座构件。 基座构件可以被构造成从安装构件接收热能。 安装构件和基座构件中的至少一个的导热率可以大于约50瓦特/米（W / m-C）。 可以匹配安装构件，基座构件和第一处理单元的联接侧的热膨胀系数（CTE）。

公开(公告)号：US20100044552A1

公开(公告)日：2010-02-25

申请号：US12194505

申请日：2008-08-19

Applicant: Bryan J. CHEN

Inventor： Bryan J. CHEN

IPC: H01L27/00 ,  H03F3/08

CPC classification number: H01L27/14609 ,  G01J1/46 ,  H01L27/14612 ,  H03G1/0088 ,  H03G3/3084 ,  H04N5/335 ,  H04N5/3559 ,  H04N5/37452

Abstract: The present disclosure is directed to automatic gain switching circuits for implementation with photodetectors that include a switchable storage network including a storage element. The switchable storage network, such as one or more capacitors, is configured and arranged to respond to a photocurrent from the photodetector and provide an increased storage for the circuit at a predetermined photocurrent. The storage elements can include one or more capacitors that can be coupled to integration capacitors of the photodetector. The switchable networks can include flux sensing switches such as MOSFETS that can activate at a desired or predetermined photocurrent level. Related methods of providing multiple gain values for a photodetector circuit, as well as focal plane arrays and imaging systems with automatic gain shifting are also described.

Abstract translation: 本公开涉及用于由光电检测器实现的自动增益切换电路，其包括包括存储元件的可切换存储网络。 诸如一个或多个电容器的可切换存储网络被配置和布置成响应来自光电检测器的光电流，并以预定的光电流为电路提供增加的存储。 存储元件可以包括可耦合到光电检测器的积分电容器的一个或多个电容器。 可切换网络可以包括通量感测开关，例如可以以期望的或预定的光电流水平激活的MOSFET。 还描述了为光电检测器电路以及具有自动增益偏移的焦平面阵列和成像系统提供多个增益值的相关方法。

公开(公告)号：US07532242B1

公开(公告)日：2009-05-12

申请号：US10899540

申请日：2004-07-26

Applicant: Bryan J. Chen

Inventor： Bryan J. Chen

IPC: H04N5/335

CPC classification number: H04N5/3743 ,  G11C19/00 ,  G11C27/02 ,  H01L27/144 ,  H04N5/341 ,  H04N5/37206 ,  H04N5/378

Abstract: A series of time delay integration TDI stages each integrate a photocurrent from a separate detector such as detectors in an array. In a first stage 20, a first integrator is initialized with a fixed bias 30, and integrates a signal from a first detector 22 during a first time interval. Next, a reset switch 26n causes that integrated first detector signal to bias a second integrator 24n. During a second integration interval, the second integrator integrates a signal from a second detector 22n. Multiple stages may be arranged in series so that an integrated signal from a previous stage biases an integrator in the current stage. At a final stage, an Nth integrator outputs the resulting signal Vfinal. Any bias used to initialize the first integrator is removed from Vfinal to achieve a total integrated signal from the detectors. A bi-directional switch 38 at each stage enables a forward or backward scan of the detectors.

Abstract translation: 一系列时间延迟积分TDI级每个集成来自单独检测器的光电流，例如阵列中的检测器。 在第一级20中，以固定偏置30初始化第一积分器，并且在第一时间间隔期间对来自第一检测器22的信号进行积分。 接下来，复位开关26n使得积分的第一检测器信号偏置第二积分器24n。 在第二积分间隔期间，第二积分器积分来自第二检测器22n的信号。 可以串联布置多个级，使得来自先前级的积分信号在当前阶段偏置积分器。 在最后阶段，第N个积分器输出结果信号Vfinal。 用于初始化第一个积分器的任何偏压从Vfinal中去除，以实现来自检测器的总的积分信号。 在每个阶段的双向开关38能够进行检测器的向前或向后扫描。