公开(公告)号：US07529997B2

公开(公告)日：2009-05-05

申请号：US11079816

申请日：2005-03-14

申请人： Patrick J. Meaney ,  William V. Huott ,  Thomas J. Knips ,  David J. Lund ,  Bryan L. Mechtly ,  Pradip Patel

发明人： Patrick J. Meaney ,  William V. Huott ,  Thomas J. Knips ,  David J. Lund ,  Bryan L. Mechtly ,  Pradip Patel

IPC分类号： G01R31/28

CPC分类号： G11C29/44 ,  G11C11/41 ,  G11C15/00 ,  G11C29/4401 ,  G11C29/789 ,  G11C2029/0407 ,  G11C2029/1208

摘要： An apparatus and method for protecting a computer system from array reliability failures uses Array Built-In Self-Test logic along with code and hardware to delete cache lines or sets that are defective, identify corresponding fuse repair values, proactively call home if spare fuses are not available, schedule soft fuse repairs for the next system restart, schedule line deletes at the next restart, store delete and fuse repairs in a table (tagged with electronic serial id, timestamp of delete or ABIST fail event, address, and type of failure) and proactively call home if there were any missed deletes that were not logged. Fuse information can also be more permanently stored into hardware electronic fuses and/or EPROMs. During a restart, previous repairs are able to be applied to the machine so that ABIST will run successfully and previous deletes to be maintained with checking to allow some ABIST failures which are protected by the line deletes to pass.

摘要翻译： 一种用于保护计算机系统免受阵列可靠性故障的装置和方法使用阵列内置自检逻辑以及代码和硬件来删除有缺陷的高速缓存行或集合，识别相应的保险丝修复值，如果备用保险丝为主动式，则主动呼叫家庭 不可用，为下一次重新启动计划软保险丝修复，下次重新启动时计划行删除，在表中存储删除和保险丝修复（标记为电子序列号，删除时间戳或ABIST失败事件，地址和故障类型 ），并且如果有任何未被记录的遗漏的删除事件，则主动呼叫回家。 保险丝信息也可以更加永久地存储在硬件电子保险丝和/或EPROM中。 在重新启动期间，以前的修复可以应用于机器，以便ABIST将成功运行，以前的删除将通过检查进行维护，以允许由删除行保护的一些ABIST故障通过。

公开(公告)号：US08055960B2

公开(公告)日：2011-11-08

申请号：US12027702

申请日：2008-02-07

申请人： William V Huott ,  David J Lund ,  Kenneth H Marz ,  Bryan L Mechtly ,  Pradip Patel

发明人： William V Huott ,  David J Lund ,  Kenneth H Marz ,  Bryan L Mechtly ,  Pradip Patel

IPC分类号： G11C29/00 ,  G01R31/28

CPC分类号： G06F12/0802 ,  G06F12/126 ,  G11C29/44 ,  G11C29/88 ,  G11C2029/0401 ,  G11C2029/0407 ,  G11C2029/4402

摘要： A computing system is provided which includes a processor having a cache memory. The cache memory includes a plurality of independently configurable subdivisions, each subdivision including a memory array. A service element (SE) of the computing system is operable to cause a built-in-self-test (BIST) to be executed to test the cache memory, the BIST being operable to determine whether any of the subdivisions is defective. When it is determined that one of the subdivisions of the cache memory determined defective by the BIST is non-repairable, the SE logically deletes the defective subdivision from the system configuration, and the SE is operable to permit the processor to operate without the logically deleted subdivision. The SE is further operable to determine that the processor is defective when a number of the defective subdivisions exceeds a threshold.

摘要翻译： 提供了一种包括具有高速缓存存储器的处理器的计算系统。 高速缓冲存储器包括多个可独立配置的子部分，每个细分包括存储器阵列。 计算系统的服务元素（SE）可操作以执行内置自检（BIST）以测试高速缓冲存储器，BIST可操作以确定任何子细分是否有缺陷。 当确定由BIST确定为有缺陷的高速缓冲存储器的一个细分是不可修复的时，SE在逻辑上从系统配置中删除缺陷细分，并且SE可操作以允许处理器在没有逻辑删除的情况下操作 细分。 当有多个缺陷细分超过阈值时，SE还可操作以确定处理器有缺陷。

公开(公告)号：US07437637B2

公开(公告)日：2008-10-14

申请号：US11336082

申请日：2006-01-20

申请人： Patrick J. Meaney ,  Timothy G. McNamara ,  Bryan L. Mechtly

发明人： Patrick J. Meaney ,  Timothy G. McNamara ,  Bryan L. Mechtly

IPC分类号： G01R31/28 ,  G11C29/00

CPC分类号： G11C29/78 ,  G01R31/318541

摘要： An apparatus and method for allowing for dynamic wordline repair in a clock running system in addition to allowing for programmable fuse support of combined Array Built-In Self-Test (ABIST) and Logic Built-In Self-Test (LBIST) testing. The method makes use of programmable fuses which contain Level Sensitive Scan Design (LSSD) latches which also have a system port. The system port allows for simpler reading of the fuses as well as for the dynamic updates of the programmable fuses for wordline and other repairs.

摘要翻译： 一种用于在时钟运行系统中允许动态字线修复的装置和方法，以及允许组合阵列内置自测（ABIST）和逻辑内置自测（LBIST）测试的可编程熔丝支持。 该方法利用可编程保险丝，其中包含具有系统端口的级别敏感扫描设计（LSSD）锁存器。 系统端口允许更简单地读取保险丝以及用于字线和其他修理的可编程保险丝的动态更新。

公开(公告)号：US07366953B2

公开(公告)日：2008-04-29

申请号：US11008371

申请日：2004-12-09

申请人： William V. Huott ,  David J. Lund ,  Kenneth H. Marz ,  Bryan L. Mechtly ,  Pradip Patel

发明人： William V. Huott ,  David J. Lund ,  Kenneth H. Marz ,  Bryan L. Mechtly ,  Pradip Patel

IPC分类号： G06F11/00

CPC分类号： G06F12/0802 ,  G06F12/126 ,  G11C29/44 ,  G11C29/88 ,  G11C2029/0401 ,  G11C2029/0407 ,  G11C2029/4402

摘要： A computing system is provided which includes a processor having a cache memory. The cache memory includes a plurality of independently configurable subdivisions, each subdivision including a memory array. A service element (SE) of the computing system is operable to cause a built-in-self-test (BIST) to be executed to test the cache memory, the BIST being operable to determine whether any of the subdivisions is defective. When it is determined that one of the subdivisions of the cache memory determined defective by the BIST is non-repairable, the SE logically deletes the defective subdivision from the system configuration, and the SE is operable to permit the processor to operate without the logically deleted subdivision. The SE is further operable to determine that the processor is defective when a number of the defective subdivisions exceeds a threshold.

摘要翻译： 提供了一种包括具有高速缓存存储器的处理器的计算系统。 高速缓冲存储器包括多个可独立配置的子部分，每个细分包括存储器阵列。 计算系统的服务元素（SE）可操作以执行内置自检（BIST）以测试高速缓冲存储器，BIST可操作以确定任何子细分是否有缺陷。 当确定由BIST确定为有缺陷的高速缓冲存储器的一个细分是不可修复的时，SE在逻辑上从系统配置中删除缺陷细分，并且SE可操作以允许处理器在没有逻辑删除的情况下操作 细分。 当有多个缺陷细分超过阈值时，SE还可操作以确定处理器有缺陷。

公开(公告)号：US20090204762A1

公开(公告)日：2009-08-13

申请号：US12027702

申请日：2008-02-07

申请人： William V. Huott ,  David J. Lund ,  Kenneth H. Marz ,  Bryan L. Mechtly ,  Pradip Patel

发明人： William V. Huott ,  David J. Lund ,  Kenneth H. Marz ,  Bryan L. Mechtly ,  Pradip Patel

IPC分类号： G06F12/00

CPC分类号： G06F12/0802 ,  G06F12/126 ,  G11C29/44 ,  G11C29/88 ,  G11C2029/0401 ,  G11C2029/0407 ,  G11C2029/4402

摘要： A computing system is provided which includes a processor having a cache memory. The cache memory includes a plurality of independently configurable subdivisions, each subdivision including a memory array. A service element (SE) of the computing system is operable to cause a built-in-self-test (BIST) to be executed to test the cache memory, the BIST being operable to determine whether any of the subdivisions is defective. When it is determined that one of the subdivisions of the cache memory determined defective by the BIST is non-repairable, the SE logically deletes the defective subdivision from the system configuration, and the SE is operable to permit the processor to operate without the logically deleted subdivision. The SE is further operable to determine that the processor is defective when a number of the defective subdivisions exceeds a threshold.

摘要翻译： 提供了一种包括具有高速缓存存储器的处理器的计算系统。 高速缓冲存储器包括多个可独立配置的子部分，每个细分包括存储器阵列。 计算系统的服务元素（SE）可操作以执行内置自检（BIST）以测试高速缓冲存储器，BIST可操作以确定任何子细分是否有缺陷。 当确定由BIST确定为有缺陷的高速缓冲存储器的一个细分是不可修复的时，SE在逻辑上从系统配置中删除缺陷细分，并且SE可操作以允许处理器在没有逻辑删除的情况下操作 细分。 当有多个缺陷细分超过阈值时，SE还可操作以确定处理器有缺陷。

公开(公告)号：US07047466B2

公开(公告)日：2006-05-16

申请号：US10161425

申请日：2002-06-03

申请人： Patrick J. Meaney ,  Timothy G. McNamara ,  Bryan L. Mechtly

发明人： Patrick J. Meaney ,  Timothy G. McNamara ,  Bryan L. Mechtly

IPC分类号： G01R31/28 ,  G11C29/00

CPC分类号： G11C29/78 ,  G01R31/318541

摘要： An apparatus and method for allowing for dynamic wordline repair in a clock running system in addition to allowing for programmable fuse support of combined Array Built-In Self-Test (ABIST) and Logic Built-In Self-Test (LBIST) testing. The method makes use of programmable fuses which contain Level Sensitive Scan Design (LSSD) latches which also have a system port. The system port allows for simpler reading of the fuses as well as for the dynamic updates of the programmable fuses for wordline and other repairs.