公开(公告)号：US08467181B2

公开(公告)日：2013-06-18

申请号：US13085485

申请日：2011-04-13

申请人： Jo-Chiao Wang ,  Cheng Tu

发明人： Jo-Chiao Wang ,  Cheng Tu

IPC分类号： G06F1/16

CPC分类号： G06F1/187

摘要： A fixing mechanism for fixing a portable device includes a casing. A track is disposed on the casing for guiding the portable device to slide. At least one hole is formed on the casing. The fixing mechanism further includes at least one spherical component installed inside the hole on the casing for wedging into a sunken part on the portable device so as to fix the portable device inside the casing. The fixing mechanism further includes a resilient component installed on a side of the casing and the spherical component for providing resilient force to the spherical component so as to push the spherical component to wedge into the sunken part on the portable device.

摘要翻译： 用于固定便携式装置的固定机构包括壳体。 轨道设置在壳体上用于引导便携式设备滑动。 在壳体上形成至少一个孔。 固定机构还包括至少一个安装在壳体上的孔内的球形部件，用于楔入便携式装置中的凹陷部分，以将便携式装置固定在壳体内。 固定机构还包括安装在壳体侧的弹性部件和球形部件，用于向球形部件提供弹性力，以将球形部件推入便携式装置中的凹陷部分。

公开(公告)号：US08429497B2

公开(公告)日：2013-04-23

申请号：US12548348

申请日：2009-08-26

申请人： Chih-Cheng Tu ,  Yan-Wun Huang ,  Han-Lung Huang ,  Ming-Hung Chou ,  Chien-Fu Huang ,  Chih-Hwa Chang

发明人： Chih-Cheng Tu ,  Yan-Wun Huang ,  Han-Lung Huang ,  Ming-Hung Chou ,  Chien-Fu Huang ,  Chih-Hwa Chang

IPC分类号： G06F11/00

CPC分类号： H03M13/05 ,  G06F11/1068 ,  G11C2029/0411 ,  H03M13/13

摘要： A method of dynamic data storage for error correction in a memory device is disclosed. Data for storage is received, and the received data is then encoded and associated error correction code (ECC) is generated. The encoded data is stored in a portion of a data partition of the memory device, wherein percentage of the stored data in the data partition is determined according to an amount of corrected errors associated with the data partition or is predetermined.

摘要翻译： 公开了一种用于存储器件中的纠错的动态数据存储的方法。 接收用于存储的数据，然后对接收到的数据进行编码，并生成相关联的纠错码（ECC）。 编码数据被存储在存储器件的数据分区的一部分中，其中存储的数据在数据分区中的百分比是根据与数据分区相关联的校正误差的量来确定的或者是预定的。

公开(公告)号：US08332607B2

公开(公告)日：2012-12-11

申请号：US12183229

申请日：2008-07-31

申请人： Chih Wei Tsai ,  Chuang Cheng ,  Yung Li Ji ,  Shih Chieh Tai ,  Chih Cheng Tu ,  Fuja Shone

发明人： Chih Wei Tsai ,  Chuang Cheng ,  Yung Li Ji ,  Shih Chieh Tai ,  Chih Cheng Tu ,  Fuja Shone

IPC分类号： G06F12/00 ,  G06F13/00 ,  G06F13/28

CPC分类号： G06F13/4239 ,  Y02D10/14 ,  Y02D10/151

摘要： A non-volatile memory storage device has a non-volatile memory, e.g., a flash memory, and a controller coupled to the non-volatile memory. The controller comprises a plurality of control circuits and an arbitration circuit. Each control circuit is configured to generate a request to update the chip-enable (CE) signals for non-volatile memory, and the arbitration circuit is configured to determine when the requests are acknowledged. The arbitration circuit generates acknowledge signals to the control circuits when all of the requests of the control circuits have been received by the arbitration circuit. The CE signals for non-volatile memory are updated when requests are acknowledged.

摘要翻译： 非易失性存储器存储设备具有非易失性存储器，例如闪存，以及耦合到非易失性存储器的控制器。 控制器包括多个控制电路和仲裁电路。 每个控制电路被配置为产生用于更新用于非易失性存储器的芯片使能（CE）信号的请求，并且仲裁电路被配置为确定何时请求被确认。 当仲裁电路已经接收到控制电路的所有请求时，仲裁电路向控制电路产生确认信号。 当请求被确认时，更新用于非易失性存储器的CE信号。

公开(公告)号：US20120086359A1

公开(公告)日：2012-04-12

申请号：US13047806

申请日：2011-03-15

申请人： Sih-Ting Wang ,  Chung-Wen Wu ,  Chien-Cheng Tu ,  Chia-Chun Liu

发明人： Sih-Ting Wang ,  Chung-Wen Wu ,  Chien-Cheng Tu ,  Chia-Chun Liu

IPC分类号： H05B37/02

CPC分类号： G09G3/3696 ,  H05B33/0827 ,  H05B33/089

摘要： A light-emitting diode driving device includes a light-emitting diode driving chip, for driving the one or more light-emitting diode strings according to a feedback voltage associated with the one or more light-emitting diode strings, and a voltage limiter, having a terminal coupled to the light-emitting diode driving chip and another terminal coupleable to the one or more light-emitting diode strings, for generating the feedback voltage for provision to the light-emitting diode driving chip according to a bottom voltage of the one or more light-emitting diode strings, and limiting the feedback voltage not to exceed a preset level.

摘要翻译： 发光二极管驱动装置包括：发光二极管驱动芯片，用于根据与一个或多个发光二极管串相关联的反馈电压驱动一个或多个发光二极管串;以及电压限制器，具有 连接到所述发光二极管驱动芯片的端子和可耦合到所述一个或多个发光二极管串的另一端子，用于根据所述一个或多个发光二极管串的底部电压产生用于提供给所述发光二极管驱动芯片的反馈电压， 更多的发光二极管串，并且限制反馈电压不超过预设电平。

公开(公告)号：US20120075356A1

公开(公告)日：2012-03-29

申请号：US13118567

申请日：2011-05-30

申请人： Chia-Chun Liu ,  Chung-Wen Wu ,  Chien-Cheng Tu ,  Sih-Ting Wang

发明人： Chia-Chun Liu ,  Chung-Wen Wu ,  Chien-Cheng Tu ,  Sih-Ting Wang

IPC分类号： G09G5/10

CPC分类号： G09G3/3406 ,  G09G2330/12

摘要： An integrated backlight driving chip for driving a light-emitting diode backlight module includes a scaler circuit and a backlight driving circuit. The scaler circuit includes a digital control unit for generating a digital control signal, and a variable reference voltage generation unit for generating a reference voltage. The backlight driving circuit is coupled to the digital control unit, the variable reference voltage generation unit, and the LED backlight module, for generating a backlight driving signal according to the digital control signal and the reference voltage so as to drive the LED backlight module.

摘要翻译： 用于驱动发光二极管背光模块的集成背光驱动芯片包括缩放器电路和背光驱动电路。 缩放器电路包括用于产生数字控制信号的数字控制单元和用于产生参考电压的可变参考电压产生单元。 背光驱动电路与数字控制单元，可变基准电压产生单元和LED背光模块耦合，用于根据数字控制信号和参考电压产生背光驱动信号，以便驱动LED背光模块。

公开(公告)号：US20120068714A1

公开(公告)日：2012-03-22

申请号：US13010783

申请日：2011-01-21

申请人： Sih-Ting Wang ,  Chung-Wen Wu ,  Chien-Cheng Tu ,  Chia-Chun Liu

发明人： Sih-Ting Wang ,  Chung-Wen Wu ,  Chien-Cheng Tu ,  Chia-Chun Liu

IPC分类号： G01R31/00

CPC分类号： G01R31/025

摘要： A short detection circuit includes a voltage divider circuit, for generating, according to a bottom voltage of one or more light-emitting diode strings, a divided voltage less than the bottom voltage. Additionally, the short detection circuit includes a voltage clamp circuit, coupled to the voltage divider circuit, for clamping the divided voltage, and a comparator, coupled to the voltage divider circuit, for comparing the divided voltage and a reference voltage, to decide whether a short circuit occurs in the one or more light-emitting diode strings according to a result of the comparison.

摘要翻译： 短路检测电路包括分压器电路，用于根据一个或多个发光二极管串的底部电压产生小于底部电压的分压。 此外，短路检测电路包括耦合到分压器电路的用于钳位分压的电压钳位电路，以及耦合到分压器电路的用于比较分压和参考电压的比较器，以确定是否 根据比较的结果，在一个或多个发光二极管串中发生短路。

公开(公告)号：US20100293309A1

公开(公告)日：2010-11-18

申请号：US12465552

申请日：2009-05-13

申请人： Yun-Ching Lin ,  Chih-Cheng Tu ,  Chih-Hwa Chang ,  Yung-Li Ji ,  Fu-Chen Cheng

发明人： Yun-Ching Lin ,  Chih-Cheng Tu ,  Chih-Hwa Chang ,  Yung-Li Ji ,  Fu-Chen Cheng

IPC分类号： G06F13/42

CPC分类号： G06F13/4081

摘要： A production tool for low-level format of a storage device is disclosed. The production tool includes an input connector connectable and an output connector, both of which conform to an interface standard. At least a redundant pin of the input connector is unconnected with a corresponding redundant pin of the output connector, and the redundant pin of the output connector is electrically connected to receive a provided predetermined signal, the presence of which indicating a low-level format mode.

摘要翻译： 公开了用于存储设备的低级格式的生产工具。 生产工具包括可连接的输入连接器和输出连接器，均符合接口标准。 输入连接器的至少一个冗余引脚与输出连接器的相应冗余引脚不连接，并且输出连接器的冗余引脚电连接以接收所提供的预定信号，其中存在指示低级格式模式 。

公开(公告)号：US20100030933A1

公开(公告)日：2010-02-04

申请号：US12183229

申请日：2008-07-31

申请人： Chih Wei Tsai ,  Chuang Cheng ,  Yung Li Ji ,  Shih Chieh Tai ,  Chih Cheng Tu ,  Fuja Shone

发明人： Chih Wei Tsai ,  Chuang Cheng ,  Yung Li Ji ,  Shih Chieh Tai ,  Chih Cheng Tu ,  Fuja Shone

IPC分类号： G06F13/12 ,  G06F12/02

CPC分类号： G06F13/4239 ,  Y02D10/14 ,  Y02D10/151

摘要： A non-volatile memory storage device has a non-volatile memory, e.g., a flash memory, and a controller coupled to the non-volatile memory. The controller comprises a plurality of control circuits and an arbitration circuit. Each control circuit is configured to generate a request to update the chip-enable (CE) signals for non-volatile memory, and the arbitration circuit is configured to determine when the requests are acknowledged. The arbitration circuit generates acknowledge signals to the control circuits when all of the requests of the control circuits have been received by the arbitration circuit. The CE signals for non-volatile memory are updated when requests are acknowledged.

摘要翻译： 非易失性存储器存储设备具有非易失性存储器，例如闪存，以及耦合到非易失性存储器的控制器。 控制器包括多个控制电路和仲裁电路。 每个控制电路被配置为产生用于更新用于非易失性存储器的芯片使能（CE）信号的请求，并且仲裁电路被配置为确定何时请求被确认。 当仲裁电路已经接收到控制电路的所有请求时，仲裁电路向控制电路产生确认信号。 当请求被确认时，更新用于非易失性存储器的CE信号。

公开(公告)号：US20090262840A1

公开(公告)日：2009-10-22

申请号：US12181325

申请日：2008-07-29

申请人： Chung-Jr Jan ,  Shang-Hsiu Wu ,  Kuo-Chi Chen ,  Ying-Jie Su ,  Po-Jui Huang ,  Chien-Cheng Tu ,  Po-Ju Lee

发明人： Chung-Jr Jan ,  Shang-Hsiu Wu ,  Kuo-Chi Chen ,  Ying-Jie Su ,  Po-Jui Huang ,  Chien-Cheng Tu ,  Po-Ju Lee

IPC分类号： H04N7/26

CPC分类号： H04N5/08 ,  G09G3/2092 ,  G09G5/006 ,  G09G2310/065 ,  G09G2320/0204 ,  G09G2320/0223 ,  H04N5/04

摘要： A synchronization signal extraction device includes a signal reception terminal for receiving a composite video signal, a threshold voltage adjuster coupled to the signal reception terminal for adjusting a threshold voltage to a ratio of a first characteristic level and a second characteristic level of the composite video signal according to the first characteristic level and the second characteristic level, a slicer coupled to the signal reception terminal and the threshold voltage adjuster for slicing the composite video signal to extract a synchronization signal in the composite video signal, and a signal output terminal coupled to the slicer for outputting the extracted synchronization signal.

摘要翻译： 同步信号提取装置包括用于接收复合视频信号的信号接收端子，耦合到信号接收端的阈值电压调节器，用于将阈值电压调整为复合视频信号的第一特征电平和第二特性电平的比率 根据第一特征电平和第二特性电平，耦合到信号接收端的限幅器和阈值电压调节器，用于对复合视频信号进行分片以提取复合视频信号中的同步信号;以及信号输出端，耦合到 限幅器，用于输出所提取的同步信号。

公开(公告)号：US07435604B2

公开(公告)日：2008-10-14

申请号：US10957738

申请日：2004-10-04

申请人： Chuan-Cheng Tu ,  Pao-I Huang ,  Jen-Chau Wu

发明人： Chuan-Cheng Tu ,  Pao-I Huang ,  Jen-Chau Wu

IPC分类号： H01L21/00

CPC分类号： H01L33/22

摘要： A method of making a light emitting diode (LED) is disclosed. The LED of the present invention comprises a semiconductor layer of a first polarity, an active layer, and a semiconductor layer of a second polarity stacked from bottom to up, wherein a stacked structure at least composed of the active layer and the semiconductor layer of the second polarity have a side with a wave-shape border in a top view of the LED and/or at least one valley, thereby increasing the efficiency of emitting the light to the outside of the LED.

摘要翻译： 公开了一种制造发光二极管（LED）的方法。 本发明的LED包括第一极性的半导体层，有源层和从底部至上层叠的第二极性的半导体层，其中至少由有源层和半导体层组成的层叠结构 第二极性在LED和/或至少一个谷的俯视图中具有波形边界的一侧，从而提高将光发射到LED的外部的效率。