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40 条记录 (耗时 0.016 秒)

    Combination Valve
    1.
    发明申请
    Combination Valve 有权
    组合阀

    公开(公告)号：US20100116256A1

    公开(公告)日：2010-05-13

    申请号：US12525204

    申请日：2008-01-15

    申请人： Christian Weis

    发明人： Christian Weis

    IPC分类号： F16K11/085 ,  F02M25/07

    CPC分类号： F16K11/0853 ,  F02M26/26 ,  F02M26/32 ,  F02M26/70 ,  F16K11/076 ,  Y10T137/86871

    摘要： The combination valve comprises a tubular center part, a gas inlet which is arranged on the outer shell of the tubular center part, a gas outlet A which is arranged adjacent to the gas inlet on the outer shell of the tubular center part, a first branch which is arranged opposite the gas outlet on the outer shell of the tubular center part, and a second branch which is arranged opposite the gas inlet on the outer shell of the tubular center part. The first branch is connected to the second branch via a cooler. A rotary slide is mounted centrally in the tubular center part such that it can rotate about the longitudinal axis of the tubular centre part. Depending on the operating state, the rotary slide shuts off at least partially the gas inlet, the gas outlet, the first branch and the second branch.

    摘要翻译： 组合阀包括管状中心部分，布置在管状中心部分的外壳上的气体入口，邻近管状中心部分外壳上的气体入口设置的气体出口A，第一分支 其与管状中心部分的外壳上的气体出口相对设置，并且与管状中心部分的外壳上的气体入口相对设置的第二分支。 第一分支经由冷却器连接到第二分支。 旋转滑块中心安装在管状中心部分中，使得其可以围绕管状中心部分的纵向轴线旋转。 根据操作状态，旋转滑块至少部分地关闭气体入口，气体出口，第一分支和第二分支。

    Semiconductor memory and method for adapting the phase relationship between a clock signal and strobe signal during the acceptance of write data to be transmitted
    2.
    发明授权
    Semiconductor memory and method for adapting the phase relationship between a clock signal and strobe signal during the acceptance of write data to be transmitted 有权
    半导体存储器和方法，用于在接收要发送的写入数据期间适配时钟信号和选通信号之间的相位关系

    公开(公告)号：US07457174B2

    公开(公告)日：2008-11-25

    申请号：US11410320

    申请日：2006-04-24

    申请人： Georg Braun ,  Eckehard Plaettner ,  Christian Weis ,  Andreas Jakobs

    发明人： Georg Braun ,  Eckehard Plaettner ,  Christian Weis ,  Andreas Jakobs

    IPC分类号： G11C7/00

    CPC分类号： G11C7/22 ,  G11C7/222 ,  G11C11/4076

    摘要： A method is provided for adapting the phase relationship between a clock signal and a strobe signal for accepting write data to be transmitted into a memory circuit, a write command signal being transmitted to the memory circuit in a manner synchronized with the clock signal, a write data signal being transmitted synchronously with the strobe signal, a phase offset between the transmitted clock signal and the transmitted strobe signal being set such that the write data are reliably accepted in the memory circuit. The method comprises the following acts performed in the memory circuit: generating a write acceptance signal depending on the clock signal and the write command signal with a specific pulse duration; determining the number of edges of the strobe signal with a defined edge direction during the pulse duration; comparing the number determined with a predetermined desired number of corresponding edges of the strobe signal; and providing an item of error information indicating whether the number determined matches the desired number.

    摘要翻译： 提供了一种适应时钟信号和选通信号之间的相位关系的方法，用于接收要发送到存储器电路的写入数据，写入命令信号以与时钟信号同步的方式发送到存储器电路，写入 数据信号与选通信号同步发送，所发送的时钟信号和发送的选通信号之间的相位偏移被设置为使得写入数据被可靠地接受在存储器电路中。 该方法包括在存储器电路中执行的以下动作：根据具有特定脉冲持续时间的时钟信号和写入命令信号产生写入验收信号; 在所述脉冲持续时间期间，确定具有限定的边缘方向的所述选通信号的边缘数; 将所选择的所述数量与所述选通信号的相应边缘的预定数量进行比较; 并提供指示所确定的数量是否匹配所需数量的错误信息项。

    Drive device
    3.
    发明授权
    Drive device 失效
    驱动装置

    公开(公告)号：US07263909B2

    公开(公告)日：2007-09-04

    申请号：US10718649

    申请日：2003-11-24

    申请人： Christian Weis

    发明人： Christian Weis

    IPC分类号： F16H1/16

    CPC分类号： E05B81/06 ,  E05B81/34 ,  F16H1/16 ,  Y10T74/19633 ,  Y10T74/19828 ,  Y10T74/19907 ,  Y10T292/1082

    摘要： The present invention is electronically driven locking device for a locking element of a motor vehicle. The device has a motor, a gear wheel including a gear ring, a hub, and an elastic intermediate element, and a control disk. The motor is linked to the gear ring via a worm gear which is arranged to turn the gear. The control disk is linked to the locking element such that when the gear ring is turned, the hub is turned via the intermediate element which in turn engages the locking element to close or open. The intermediate element is arranged to absorb kinetic energy in the device.

    摘要翻译： 本发明是用于机动车辆的锁定元件的电子驱动锁定装置。 该装置具有马达，包括齿圈的齿轮，轮毂和弹性中间元件以及控制盘。 马达通过设置成转动齿轮的蜗轮连接到齿圈上。 控制盘连接到锁定元件，使得当齿轮转动时，轮毂经由中间元件转动，中间元件又与锁定元件接合以关闭或打开。 中间元件布置成吸收装置中的动能。

    MEMORY CHIP AND METHOD FOR OPERATING A MEMORY CHIP
    4.
    发明申请
    MEMORY CHIP AND METHOD FOR OPERATING A MEMORY CHIP 有权
    记忆芯片和操作记忆芯片的方法

    公开(公告)号：US20070035326A1

    公开(公告)日：2007-02-15

    申请号：US11461380

    申请日：2006-07-31

    申请人： Georg Braun ,  Christian Weis ,  Eckehard Plaettner

    发明人： Georg Braun ,  Christian Weis ,  Eckehard Plaettner

    IPC分类号： H03K19/003

    CPC分类号： G11C7/1048 ,  G06F13/4086 ,  G11C5/04

    摘要： Methods and apparatus for setting various terminations of a memory chip. In one embodiment, the memory chip includes a terminal, a termination circuit that can be connected to the terminal in order to terminate the terminal with a settable resistance value, a control command port for receiving a control command signal, and a control circuit that is connected to the termination circuit in order to set a resistance value as a function of a received control command signal.

    摘要翻译： 用于设置存储芯片的各种终端的方法和装置。 在一个实施例中，存储器芯片包括终端，可以连接到终端以终止具有可设置电阻值的终端的终端电路，用于接收控制命令信号的控制命令端口，以及控制电路， 连接到终端电路，以便根据接收到的控制命令信号设置电阻值。

    Circuit configuration with a memory array
    6.
    发明授权
    Circuit configuration with a memory array 有权

    公开(公告)号：US06614700B2

    公开(公告)日：2003-09-02

    申请号：US10116826

    申请日：2002-04-05

    申请人： Stefan Dietrich ,  Peter Schrögmeier ,  Sabine Kieser ,  Christian Weis

    发明人： Stefan Dietrich ,  Peter Schrögmeier ,  Sabine Kieser ,  Christian Weis

    IPC分类号： G11C700

    CPC分类号： G11C7/109 ,  G11C7/1078 ,  G11C7/22

    摘要： The circuit configuration has a memory array, a memory access controller, a control unit, and an input/output circuit. The control unit outputs a control signal simultaneously to the memory access controller and to the input/output circuit. When the control signal is received, the input/output circuit outputs data to the memory access controller via the data bus. When the control signal is received, the memory access controller stores the data present on the data bus in memory cells of the memory array. Owing to different geometric arrangements and different electrical capacitances, differences in propagation time of the control signals may occur on the path from the control unit to the memory access controller and from the control unit to the input/output circuit. For this purpose, a delay circuit or delay line is provided on the signal path to the memory access controller which brings about a delay of the control signal. This enables precise synchronization of the writing of data into the memory array.

    Integrated memory with row access control to activate and precharge row lines, and method of operating such a memory
    8.
    发明授权
    Integrated memory with row access control to activate and precharge row lines, and method of operating such a memory 有权
    具有行访问控制的集成存储器，用于激活和预充行行，以及操作这种存储器的方法

    公开(公告)号：US06396755B2

    公开(公告)日：2002-05-28

    申请号：US09864978

    申请日：2001-05-24

    申请人： Stefan Dietrich ,  Sabine Schöniger ,  Peter Schrögmeier ,  Christian Weis

    发明人： Stefan Dietrich ,  Sabine Schöniger ,  Peter Schrögmeier ,  Christian Weis

    IPC分类号： G11C700

    CPC分类号： G11C8/00

    摘要： An integrated memory has memory cells which are each connected to a row line to select one of the memory cells and to a column line to read or write a data signal. A row access controller is used to activate one of the row lines to select one of the memory cells and to control a precharging operation to precharge one of the row lines. A precharge command initiates a precharging operation. The precharging operation for an activated row line is triggered by the row access controller when the reading or writing of a data signal has been finished and when a defined time interval, during which the row line must at least be activated, has elapsed since the activation. As a result, a precharging operation of the activated row line is controlled in a self-adjusting manner. A method of operating an integrated memory is also provided.

    摘要翻译： 集成存储器具有各自连接到行线的存储单元，以选择存储器单元之一和列线来读取或写入数据信号。 行访问控制器用于激活行行之一以选择存储器单元之一并且控制预充电操作以对行行之一进行预充电。 预充电命令启动预充电操作。 激活的行线的预充电操作在数据信号的读取或写入已经完成时由行存取控制器触发，并且当激活行至少必须被激活的定义的时间间隔已经过去时 。 结果，以自动调节的方式控制激活的行线的预充电操作。 还提供了一种操作集成存储器的方法。

    Module with force hysteresis
    10.
    发明授权
    Module with force hysteresis 失效
    具有力滞后的模块

    公开(公告)号：US06526844B1

    公开(公告)日：2003-03-04

    申请号：US09514196

    申请日：2000-02-24

    申请人： Christian Weis

    发明人： Christian Weis

    IPC分类号： G05G114

    CPC分类号： B60K26/021 ,  F02D11/02 ,  Y10T74/20528 ,  Y10T74/20534

    摘要： The module (10) serves for producing a force hysteresis during pivoting of a rotary element (14, 16) which is mounted rotatably in a housing (12) and on which there is secured at least one spring element (20), of which the free end slides, via a friction element (18), on a stationary friction surface (22). In order for it not to be necessary to rely on separate restoring mechanisms, it is proposed that, in all the angled positions of the rotary element (14, 16) relative to the housing (12), the reaction force of the spring element (22) subjects the rotary element (14, 16) to a restoring moment about the rotary spindle (24). Such a module (10), with a compact construction, makes it possible, with the aid of a spring element (20), to produce both the restoring forces and the frictional forces necessary for the hysteresis.

    摘要翻译： 模块（10）用于在可旋转地安装在壳体（12）中的旋转元件（14,16）的枢转期间产生力滞后，并且其上固定有至少一个弹簧元件（20），其中 通过摩擦元件（18）在固定摩擦表面（22）上的自由端滑块。 为了不需要依赖于单独的恢复机构，建议在旋转元件（14,16）相对于壳体（12）的所有成角度的位置中，弹簧元件的反作用力 22）使旋转元件（14,16）旋转主轴（24）的恢复力矩。 具有紧凑结构的这种模块（10）可以借助于弹簧元件（20）来产生恢复力和滞后所需的摩擦力。