摘要:
A method includes receiving, in a postage meter, input from a user to select a rate option in the postage meter for mail that is to be pre-sorted at a remote location. If the selected pre-sort rate option has been programmed into the postage meter, the postage meter is set to print postage indicia in accordance with the selected pre-sort rate option. If the selected pre-sort rate option has not been programmed into the postage meter, the postage meter displays, to the user, information to indicate to the user how to arrange for the selected pre-sort rate option to be programmed into the postage meter.
摘要:
A pipeline processor having an exception program counter chain generates a return address in the exception program counter chain for an executing instruction. The return address is the point at which instruction execution should resume after an exception handler routine runs if the executing instruction incurs an exception. The return address is stored into a profiling register if and when the corresponding instruction completes execution. The profiling register is periodically sampled and a statistical profile is built of instructions executed in the processor by using the return addresses sampled. A sampled return address is identified as a branch delay instruction and included in the statistical profile if the sampled return address is that of a branch instruction which immediately precedes a branch delay instruction.
摘要:
A processor is provided which performs relative addressing using the exception program counter. In one embodiment, a pipelined processor is provided with an exception program counter (EPC) register chain for tracking exception re-entry points in the instruction stream, and the instruction pipeline is provided with access to at least one of the registers in the register chain. The pipeline includes a fetch stage, a decode stage, and an execute stage. The exception PC register is identified by the decode stage as an operand in a memory access instruction for the execute stage to operate on. The execute stage then adds the contents of the exception PC register to the contents of a processor register or to a literal value to determine a target memory address.
摘要:
A circuit generally comprising a debug port and a processor is disclosed. The processor may be configured to (i) bootstrap to a first memory, (ii) disable said debug port while in a first mode of at least three modes, (iii) authenticate said debug port while in a second mode of said modes and (iv) disable said debug port in response to failing said authentication.
摘要:
A circuit generally comprising a first memory, a second memory and a processor is disclosed. The first memory may store an instruction to read an updated security value of at least three security values. The second memory may store (i) the updated security value and (ii) information related to security of the circuit. The processor may be configured to (i) execute the instruction while a register stores a highest security value of the security values, (ii) copy the information from the second memory to a third memory in response to the update security value being greater than a current security value of the security values stored in the third memory and (iii) ignore the information in the second memory in response to the updated security value being no greater than the current security value.
摘要:
A four-phase arbitration system employs a master and a slave arbiter. The master arbiter operates to provide ownership of a bus to a first device if a second device, coupled to the slave arbiter is not conducting a transaction. If the second device desires use of the bus, the slave arbiter sends a request to the master arbiter, which asserts an acknowledge signal for as long as the first device has ownership of the bus, and at least as long as a timeout of the first device. The master arbiter de-asserts its acknowledge signal when the first device ceases ownership of the bus. The slave arbiter is responsive to the de-assertion of the acknowledge signal to assert bus ownership to the second device. When the second device transaction is completed, its request signal is de-asserted to the master arbiter, causing the master arbiter to re-assert the acknowledge signal. Failure to receive a de-asserted acknowledge signal causes the slave arbiter to move to the next state.
摘要:
A value selection and printing apparatus includes a printing device having a printing wheel which is rotatable into a plurality of positions to present a corresponding plurality of value printing elements into a printing position; a value selecting device including a moveable first rack gear having a driven element thereon, a rigid guide shaft mounted within the printing device, a second rack gear mounted to be slidable on the guide shaft and having a driving element thereon in engagement with the driven element, wherein the second rack gear operatively engages the printing wheel so that rotation of the printing wheel occurs due to transmission of a moment of the first rack gear to the printing wheel via the second rack gear; and a substantially cylindrical security sleeve slidably disposed on the guide shaft and moveable in response to sliding movement of the second rack gear on the guide shaft wherein the guide shaft includes a weakened section such that at times when a force sufficient to disassociate the printing wheel and the second rack gear is exerted against the printing wheel, the guide shaft bends at the weakened section preventing sliding movement of the security sleeve over the weakened section.
摘要:
A mailing machine for the creation of mailpieces includes a print station and a transport system for passing a length of the label material through the print station to receive information on a face surface of the label material. A processor is adapted to store rating information based upon the weight and dimensions of the mailpiece and is operatively coupled to, and controls, the print station and transport system. In a first operating mode, the processor prints rating information on a length of label material, and in a second operating mode, the processor prints postage indicia on the face surface of the label material based upon the rating information for subsequent application to a mailpiece. In the second operating mode, the postage indicia may optionally be printed on the label material or directly on the face surface of the mailpiece envelope.
摘要:
A mail processing system and method that will that reduce clogging of the print head nozzles due to the use of different inks is provided. When an ink tank is being replaced in a mailing system, the system controller determines if the ink in the new ink tank is a known ink type that is deemed to be compatible with the ink from the ink tank being replaced. If the new ink is deemed to be not compatible with the ink from the tank being replaced, a maintenance operation is performed to remove the ink from the ink tank being replaced that may remain in the supply path and print head from the system. By removing the ink remaining from the ink tank being replaced out of the system, there is minimal ink left in the supply path or print head to mix with the new ink.
摘要:
A circuit generally comprising a plurality of master modules and a supervisor module is disclosed. The supervisor module may be configured to (i) detect a target address and a particular master module of the master modules initiating a transaction on a bus, (ii) identify a predetermined authorization in response to the particular master module, the target address and a current security mode of at least three security modes and (iii) subvert the transaction in response to the predetermined authorization restricting the transaction.