公开(公告)号：US20100044708A1

公开(公告)日：2010-02-25

申请号：US12258459

申请日：2008-10-27

Applicant: Heng-Chang Lin ,  Chun-Jen Ma ,  Yi-Ling Hung ,  Teng-Yuan Hsu

Inventor： Heng-Chang Lin ,  Chun-Jen Ma ,  Yi-Ling Hung ,  Teng-Yuan Hsu

IPC: H01L33/00 ,  H01L21/00

CPC classification number: H01L27/124 ,  H01L29/41733 ,  H01L29/66765 ,  H01L29/78696

Abstract: A fabrication method of a thin film transistor includes providing a substrate at first. Thereafter, a first gate is formed on the substrate. An insulator is then formed to cover the first gate and a portion of the substrate. After that, a channel structure is formed on the insulator above the first gate. In addition, a metal layer is formed to cover the channel structure and a portion of the insulator. Next, the metal layer is patterned, and at least the metal layer on two sidewalls of the channel structure is retained to form a source and a drain, respectively. Moreover, a passivation layer is formed to at least cover the source, the drain and a portion of the insulator.

Abstract translation: 薄膜晶体管的制造方法包括首先提供衬底。 此后，在基板上形成第一栅极。 然后形成绝缘体以覆盖第一栅极和衬底的一部分。 之后，在第一栅极上的绝缘体上形成沟道结构。 此外，形成金属层以覆盖沟道结构和绝缘体的一部分。 接下来，对金属层进行图案化，并且至少保持沟道结构的两个侧壁上的金属层以分别形成源极和漏极。 此外，钝化层形成为至少覆盖源极，漏极和绝缘体的一部分。

公开(公告)号：US20100227442A1

公开(公告)日：2010-09-09

申请号：US12544231

申请日：2009-08-20

Applicant: Ya-Ju Lu ,  Jun-Yao Huang ,  Ming-Chu Chen ,  Yu-Fang Wang ,  Chun-Jen Ma

Inventor： Ya-Ju Lu ,  Jun-Yao Huang ,  Ming-Chu Chen ,  Yu-Fang Wang ,  Chun-Jen Ma

IPC: H01L21/336

CPC classification number: H01L29/66765 ,  H01L27/1255 ,  H01L27/1288

Abstract: A method of manufacturing thin film transistor is provided, in which the method of manufacturing includes a new etching process of island semiconductor. The new etching process of island semiconductor is controlled by a flow rate of etching gas and a regulation of etching power. When etching the island semiconductor, a part of gate insulation layer exposed out of the island semiconductor is etched at the same time. Consequently, the thickness of gate insulation layer over the storage capacitance electrode is reduced, the distance between the pixel electrode and the storage capacitance electrode is decreased, and the storage capacitance of pixel is increased. Finally, the width of storage capacitance electrode is reduced appropriately and the aperture ratio of product is increased.

Abstract translation: 提供一种制造薄膜晶体管的方法，其中制造方法包括岛状半导体的新的蚀刻工艺。 岛状半导体的新的蚀刻工艺由蚀刻气体的流量和蚀刻功率的调节来控制。 当蚀刻岛状半导体时，同时蚀刻露出岛状半导体的栅极绝缘层的一部分。 因此，存储电容电极上的栅极绝缘层的厚度减小，像素电极和辅助电容电极之间的距离减小，并且像素的存储电容增加。 最后，适当降低了存储电容电极的宽度，增加了产品的开口率。

公开(公告)号：US07816194B2

公开(公告)日：2010-10-19

申请号：US12544231

申请日：2009-08-20

Applicant: Ya-Ju Lu ,  Jun-Yao Huang ,  Ming-Chu Chen ,  Yu-Fang Wang ,  Chun-Jen Ma

Inventor： Ya-Ju Lu ,  Jun-Yao Huang ,  Ming-Chu Chen ,  Yu-Fang Wang ,  Chun-Jen Ma

IPC: H01L21/84

CPC classification number: H01L29/66765 ,  H01L27/1255 ,  H01L27/1288

Abstract: A method of manufacturing thin film transistor is provided, in which the method of manufacturing includes a new etching process of island semiconductor. The new etching process of island semiconductor is controlled by a flow rate of etching gas and a regulation of etching power. When etching the island semiconductor, a part of gate insulation layer exposed out of the island semiconductor is etched at the same time. Consequently, the thickness of gate insulation layer over the storage capacitance electrode is reduced, the distance between the pixel electrode and the storage capacitance electrode is decreased, and the storage capacitance of pixel is increased. Finally, the width of storage capacitance electrode is reduced appropriately and the aperture ratio of product is increased.

Abstract translation: 提供一种制造薄膜晶体管的方法，其中制造方法包括岛状半导体的新的蚀刻工艺。 岛状半导体的新的蚀刻工艺由蚀刻气体的流量和蚀刻功率的调节来控制。 当蚀刻岛状半导体时，同时蚀刻露出岛状半导体的栅极绝缘层的一部分。 因此，存储电容电极上的栅极绝缘层的厚度减小，像素电极和辅助电容电极之间的距离减小，并且像素的存储电容增加。 最后，适当降低了存储电容电极的宽度，增加了产品的开口率。