公开(公告)号：US20080168409A1

公开(公告)日：2008-07-10

申请号：US11621184

申请日：2007-01-09

申请人： Charles Chiu ,  Craig Lussier

发明人： Charles Chiu ,  Craig Lussier

IPC分类号： G06F17/50

CPC分类号： G06F17/5036

摘要： A method, apparatus, and computer program product for creating a model representing an electrical network residing in an integrated circuit package.

摘要翻译： 一种用于创建表示集成电路封装中的电网的模型的方法，装置和计算机程序产品。

公开(公告)号：US20060294487A1

公开(公告)日：2006-12-28

申请号：US11159915

申请日：2005-06-23

申请人： Adam Bittner ,  Timothy Budell ,  Robert Cusimano ,  Richard Dauphin ,  Matthew Guzowski ,  Craig Lussier ,  David Stone ,  Patrick Wilder

发明人： Adam Bittner ,  Timothy Budell ,  Robert Cusimano ,  Richard Dauphin ,  Matthew Guzowski ,  Craig Lussier ,  David Stone ,  Patrick Wilder

IPC分类号： G06F17/50

CPC分类号： H01L23/50 ,  G06F17/5077 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011

摘要： A system and method for generating simulated wiring connections between first I/O terminals of a semiconductor device and second I/O terminals of a carrier. The method comprises identifying a plurality of first factors and instances of each first factor relating to a semiconductor device and identifying a plurality of second factors and instances of each second factor relating to a carrier. The first and second factors are associated with each other on a one-to-one basis. The instances of each first factor are correlated to the instances of each associated second factor on a one-to-one basis. A simulated wiring connection automatically is generated between each first I/O terminal and a matching second I/O terminal, subject to an identified instance of each first factor of each first I/O terminal being correlated to an identified instance of the associated second factor of the matching second I/O terminal.

摘要翻译： 一种用于在半导体器件的第一I / O端子与载体的第二I / O端子之间产生模拟布线连接的系统和方法。 该方法包括识别与半导体器件相关的每个第一因素的多个第一因素和实例，并且识别与载波相关的每个第二因素的多个第二因素和实例。 第一和第二因素在一对一的基础上相互关联。 每个第一因子的实例与每个相关联的第二因子的实例在一对一的基础上相关。 在每个第一I / O终端和匹配的第二I / O终端之间自动生成模拟接线连接，受到每个第一I / O端子的每个第一因子的识别实例与相关联的第二因素的识别实例相关联 的匹配第二个I / O端子。

公开(公告)号：US07809543B2

公开(公告)日：2010-10-05

申请号：US11621184

申请日：2007-01-09

申请人： Charles Chiu ,  Craig Lussier

发明人： Charles Chiu ,  Craig Lussier

IPC分类号： G06F17/50 ,  G06F9/45

CPC分类号： G06F17/5036

摘要： A method, apparatus, and computer program product for creating a model representing an electrical network residing in an integrated circuit package.

摘要翻译： 一种用于创建表示集成电路封装中的电网的模型的方法，装置和计算机程序产品。

公开(公告)号：US20080010625A1

公开(公告)日：2008-01-10

申请号：US11858995

申请日：2007-09-21

申请人： Adam Bittner ,  Timothy Budell ,  Robert Cusimano ,  Richard Dauphin ,  Matthew Guzowski ,  Craig Lussier ,  David Stone ,  Patrick Wilder

发明人： Adam Bittner ,  Timothy Budell ,  Robert Cusimano ,  Richard Dauphin ,  Matthew Guzowski ,  Craig Lussier ,  David Stone ,  Patrick Wilder

IPC分类号： G06F17/50

CPC分类号： H01L23/50 ,  G06F17/5077 ,  H01L2224/16225 ,  H01L2924/15174 ,  H01L2924/15311 ,  H01L2924/3011

摘要： A system and method for generating simulated wiring connections between a semiconductor device and a carrier. The method comprises identifying a plurality of first factors and instances of each first factor relating to the semiconductor device and identifying a plurality of second factors and instances of each second factor relating to the carrier. The first and second factors are associated with each other on a one-to-one basis. A simulated wiring connection is generated between a first I/O terminal and a matching second I/O terminal, subject to an identified instance of each first factor of each first I/O terminal being correlated to an identified instance of the associated second factor of the matching second I/O terminal. A simulated wiring connection is generated between third I/O terminals located in a first region and fourth I/O terminals located in said second region.

摘要翻译： 一种用于在半导体器件和载体之间产生模拟布线连接的系统和方法。 该方法包括识别与半导体器件相关的多个第一因子和每个第一因素的实例，并且识别与载波相关的每个第二因素的多个第二因素和实例。 第一和第二因素在一对一的基础上相互关联。 在第一I / O端子和匹配的第二I / O端子之间产生模拟接线连接，受到每个第一I / O端子的每个第一因子的识别实例与所识别的相关联的第二因子的实例相关联 匹配的第二个I / O终端。 在位于第一区域的第三I / O端子和位于所述第二区域中的第四I / O端子之间产生模拟布线连接。

公开(公告)号：US20050102641A1

公开(公告)日：2005-05-12

申请号：US10605983

申请日：2003-11-12

申请人： Patrick Buffet ,  Charles Chiu ,  Gustina Collins ,  Craig Lussier

发明人： Patrick Buffet ,  Charles Chiu ,  Gustina Collins ,  Craig Lussier

IPC分类号： G06F9/45 ,  G06F17/50

CPC分类号： G06F17/5036

摘要： Disclosed is an improved method of determining mutual inductance of wires in an electronic design. First, the invention selects a pair of wires. Then, the invention adds concentric ring lines to the design. The invention then adds straight line segments representing each wire between points where each corresponding wire crosses the adjacent ring lines. Each of the straight lines run from a point where a corresponding wire crosses an outer concentric ring line to a point where the corresponding wire crosses an inner concentric ring line. The invention can then very simply calculate the mutual inductance between the straight line segments (not the actual potentially non-linear wires themselves). The mutual inductance of the straight line segments only comprises an approximate mutual inductance of the wires because the actual mutual inductance of the wires may be slightly different if the wires are non-linear.

摘要翻译： 公开了一种确定电子设计中电线互感的改进方法。 首先，本发明选择一对电线。 然后，本发明在设计中增加了同心环线。 然后，本发明在每个对应的线穿过相邻环线的点之间添加表示每条线的直线段。 每条直线从对应的线穿过外部同心环线到相应的线穿过内部同心环线的点延伸。 因此，本发明可以非常简单地计算直线段之间的互感（而不是实际的潜在的非线性线本身）。 直线段的互感仅包括导线的近似互感，因为如果导线是非线性的，导线的实际互感可能略有不同。

公开(公告)号：US06606732B2

公开(公告)日：2003-08-12

申请号：US09734515

申请日：2000-12-11

申请人： Patrick H. Buffet ,  Craig Lussier ,  Joseph Natonio

发明人： Patrick H. Buffet ,  Craig Lussier ,  Joseph Natonio

IPC分类号： G06F1750

CPC分类号： G06F17/5068

摘要： An automated method of selecting differential pairs in an integrated circuit comprising loading the design database for the integrated circuit package, and selecting output parameters for the differential pairs comprises adjacency criteria for the different pairs, time of flight tolerances for the differential pairs, and the redistribution layers and their voltage references. The method then includes comparing the output parameters to the design in the design database, and obtaining a resulting differential pairs list. The differential pair list preferably includes differential signal pairs having electrical characteristics within a predetermined design tolerance range. At least some of the differential signal pairs may comprise individual wires or connectors not physically adjacent one another.

公开(公告)号：US20060036981A1

公开(公告)日：2006-02-16

申请号：US11234560

申请日：2005-09-23

申请人： Timothy Budell ,  Patrick Buffet ,  Craig Lussier

发明人： Timothy Budell ,  Patrick Buffet ,  Craig Lussier

IPC分类号： G06F17/50

CPC分类号： G01R31/2853 ,  G01R31/2896 ,  G06F3/0622 ,  G06F3/0637 ,  G06F3/065 ,  G06F3/067 ,  G06F11/2069

摘要： An electrical resistance determination method. Input to the method includes a description of at least one electrical network within a substrate. The description includes specification of a plurality of first ports on a first side of the substrate, and a plurality of second ports on a second side of the substrate, for each electrical network. All of the first ports are electrically isolated from one another. All of the second ports are electrically connected to a common voltage. A computer readable program code, which is executed by a processor of a computer system computes for a first electrical network of the at least one electrical network an electrical resistance between each first port and a port of the second ports. The computer code may also display a perspective plot of the computed electrical resistances as a bar oriented about normal to each first port.

摘要翻译： 电阻测定方法。 该方法的输入包括对衬底内的至少一个电网的描述。 该描述包括对于每个电网络，在衬底的第一侧上的多个第一端口以及衬底的第二侧上的多个第二端口的规格。 所有的第一个端口彼此电隔离。 所有第二端口电连接到公共电压。 由计算机系统的处理器执行的计算机可读程序代码为所述至少一个电网的第一电网计算每个第一端口和第二端口的端口之间的电阻。 计算机代码还可以将所计算的电阻的透视图显示为大致垂直于每个第一端口的条。

公开(公告)号：US20050114050A1

公开(公告)日：2005-05-26

申请号：US10721966

申请日：2003-11-25

申请人： Timothy Budell ,  Patrick Buffet ,  Craig Lussier

发明人： Timothy Budell ,  Patrick Buffet ,  Craig Lussier

IPC分类号： G01R31/04 ,  G01R31/28 ,  G06F3/06 ,  G06F11/00 ,  G06F11/14 ,  G06F11/20 ,  G06F12/00 ,  G06F12/08 ,  G06F13/00 ,  G06F19/00

CPC分类号： G01R31/2853 ,  G01R31/2896 ,  G06F3/0622 ,  G06F3/0637 ,  G06F3/065 ,  G06F3/067 ,  G06F11/2069

摘要： An electrical resistance determination method. Input to the method includes a description of at least one electrical network within a substrate. The description includes specification of a plurality of first ports on a first side of the substrate, and a plurality of second ports on a second side of the substrate, for each electrical network. All of the first ports are electrically isolated from one another. All of the second ports are electrically connected to a common voltage. A computer readable program code, which is executed by a processor of a computer system computes for a first electrical network of the at least one electrical network an electrical resistance between each first port and a port of the second ports. The computer code may also display a perspective plot of the computed electrical resistances as a bar oriented about normal to each first port.

摘要翻译： 电阻测定方法。 该方法的输入包括对衬底内的至少一个电网的描述。 该描述包括对于每个电网络，在衬底的第一侧上的多个第一端口以及衬底的第二侧上的多个第二端口的规格。 所有的第一个端口彼此电隔离。 所有第二端口电连接到公共电压。 由计算机系统的处理器执行的计算机可读程序代码为所述至少一个电网的第一电网计算每个第一端口和第二端口的端口之间的电阻。 计算机代码还可以将所计算的电阻的透视图显示为大致垂直于每个第一端口的条。