Method and system for providing enhanced performance of web browsing
    2.
    发明授权
    Method and system for providing enhanced performance of web browsing 有权
    提高Web浏览性能的方法和系统

    公开(公告)号:US07953820B2

    公开(公告)日:2011-05-31

    申请号:US10659486

    申请日:2003-09-10

    IPC分类号: G06F15/16

    摘要: An approach is provided for supporting retrieval of web content over a meshed communication network (111). A first server (105) receives a request from a browser application (103) for the content resident in the web server (109). The first server (105) includes a downstream proxy (401) configured to modify the request to include information specifying support of a parse and pre-fetch service within an optional header field of the request as to permit handling of the modified request by the web server (109) in absence of an upstream proxy (403) that is communicating with the web server (109). A second server (107) is configured as the upstream proxy (403) to intercept the modified request and pre-fetch the content from the web server (109). The second server (107) forwards the pre-fetched content over the communication network (111) to the first server (105). This approach has particular applicability in relatively high latency networks, such as a satellite communications system.

    摘要翻译: 提供了一种用于支持通过网状通信网络(111)检索网页内容的方法。 第一服务器(105)从用于驻留在web服务器(109)中的内容的浏览器应用(103)接收请求。 第一服务器(105)包括下游代理(401),其被配置为修改请求以包括在请求的可选报头字段内指定解析和预取服务的支持的信息,以允许由web处理修改的请求 服务器(109)在没有与web服务器(109)通信的上游代理(403)的情况下。 第二服务器(107)被配置为上游代理(403),以拦截修改的请求并从网络服务器(109)预取内容。 第二服务器(107)通过通信网络(111)将预先获取的内容转发到第一服务器(105)。 这种方法在诸如卫星通信系统的相对高延迟的网络中具有特别的适用性。

    DELAY LINE REGULATION USING HIGH-FREQUENCY MICRO-REGULATORS
    3.
    发明申请
    DELAY LINE REGULATION USING HIGH-FREQUENCY MICRO-REGULATORS 有权
    使用高频微调节器进行延时线路调节

    公开(公告)号:US20090206952A1

    公开(公告)日:2009-08-20

    申请号:US12030946

    申请日:2008-02-14

    IPC分类号: H03H7/00

    CPC分类号: H03H11/265

    摘要: A regulated delay line device includes main regulator coupled to a node, and a plurality of delay branches coupled to the node to receive a voltage output to the node by the main regulator. Each of the plurality of delay branches includes a micro-regulator and a delay line. The delay line is coupled to the micro-regulator such that unfiltered noise is removed locally at each delay branch by a corresponding micro-regulator.

    摘要翻译: 稳定的延迟线装置包括耦合到节点的主调节器和耦合到节点的多个延迟分支,以通过主调节器接收到节点的电压输出。 多个延迟分支中的每一个包括微调节器和延迟线。 延迟线耦合到微调节器,使得在每个延迟分支处通过相应的微调节器局部去除未滤波的噪声。

    Voltage-controlled delay circuit using second-order phase interpolation
    4.
    发明授权
    Voltage-controlled delay circuit using second-order phase interpolation 失效
    使用二阶相位插值的电压控制延迟电路

    公开(公告)号:US07545193B2

    公开(公告)日:2009-06-09

    申请号:US10697751

    申请日:2003-10-30

    IPC分类号: H03H11/16

    CPC分类号: H03L7/0812

    摘要: Phase interpolation techniques for voltage-controlled delay line (VCDL) implementation are provided. The techniques of the invention may employ a second-order phase interpolation topology to improve tuning range performance of the VCDL over process and temperature variation. In one aspect of the invention, the technique may use a complementary input signal to set an absolute 180-degree phase reference. As a result, the maximum tuning range of 180 degrees can be achieved regardless of internal delay variation.

    摘要翻译: 提供电压延迟线(VCDL)实现的相位插值技术。 本发明的技术可以采用二阶相位插值拓扑来改善VCDL过程和温度变化的调谐范围性能。 在本发明的一个方面中,该技术可以使用互补输入信号来设置绝对180度相位参考。 结果,可以实现180度的最大调谐范围,而不管内部延迟变化。

    Method and system for efficient flow control in a spot beam satellite system
    6.
    发明申请
    Method and system for efficient flow control in a spot beam satellite system 有权
    光束卫星系统中有效流量控制的方法和系统

    公开(公告)号:US20060262724A1

    公开(公告)日:2006-11-23

    申请号:US11130985

    申请日:2005-05-17

    IPC分类号: H04J1/16 H04L12/56

    摘要: An approach for providing flow control in a radio communication system is disclosed. A request from a non-satellite system specific side of a transport interface is made to a system specific side of the transport interface for a flow control allocation that specifies an amount of data to be stored in a queue of the system specific side of the transport interface. The system specific side supports a signaling function that is based on a transmission characteristic of the radio communication system. The flow control allocation is generated based upon availability of the queue, wherein the destination address is a link layer address of the satellite communication system. This arrangement has particular applicability to a satellite network (e.g., Very Small Aperture Terminal (VSAT) network) that provides data communication services.

    摘要翻译: 公开了一种用于在无线电通信系统中提供流量控制的方法。 来自传输接口的非卫星系统特定侧的请求被做成用于流控制分配的传输接口的系统特定侧,其指定要存储在传输的系统特定侧的队列中的数据量 接口。 系统特定侧支持基于无线电通信系统的传输特性的信令功能。 基于队列的可用性生成流量控制分配,其中目的地地址是卫星通信系统的链路层地址。 这种布置对于提供数据通信服务的卫星网络(例如,极小孔径终端(VSAT)网络)具有特别的适用性。

    CALIBRATION SCHEMES FOR CHARGE-RECYCLING STACKED VOLTAGE DOMAINS
    8.
    发明申请
    CALIBRATION SCHEMES FOR CHARGE-RECYCLING STACKED VOLTAGE DOMAINS 有权
    充电回收堆叠电压域的校准方案

    公开(公告)号:US20140176198A1

    公开(公告)日:2014-06-26

    申请号:US13601240

    申请日:2012-08-31

    IPC分类号: G05F1/46

    摘要: A method and system are disclosed for calibrating a mid-voltage node in an integrated circuit including an input-output circuit having charge-recycling stacked voltage domains including at least first and second voltage domains. In one embodiment, the method comprises transmitting data through the input-output circuit, including transmitting a first portion of the data across the first voltage domain, and transmitting a second portion of the data across the second voltage domain. The method further comprises measuring a specified characteristic of the data transmitted through the input-output circuit; and based on the measured specified characteristic, adjusting a voltage of said mid-voltage node to a defined value. The voltage of the mid-voltage node may be adjusted to accomplish a number of objectives, for example, to achieve a desired trade-off between power and performance, or so that the two voltage domains have the same performance.

    摘要翻译: 公开了一种用于校准集成电路中的中压节点的方法和系统,该集成电路包括具有包括至少第一和第二电压域的电荷再循环层叠电压域的输入 - 输出电路。 在一个实施例中,该方法包括通过输入 - 输出电路传输数据,包括在第一电压域上传输数据的第一部分,以及跨越第二电压域传输数据的第二部分。 该方法还包括测量通过输入 - 输出电路传输的数据的指定特性; 并且基于所测量的特定特性,将所述中间电压节点的电压调整到规定值。 可以调节中间电压节点的电压以实现多个目标,例如,在功率和性能之间实现期望的权衡,或者使得两个电压域具有相同的性能。

    Data-dependent jitter pre-emphasis for high-speed serial link transmitters
    9.
    发明申请
    Data-dependent jitter pre-emphasis for high-speed serial link transmitters 审中-公开
    高速串行链路发射机的数据相关抖动预加重

    公开(公告)号:US20070177663A1

    公开(公告)日:2007-08-02

    申请号:US11345109

    申请日:2006-01-31

    IPC分类号: H03H7/30

    摘要: In the context of high-speed serial links, data-dependent jitter compensation techniques performed using phase pre-distortion. Broadly contemplated is an expansion of the notion of pre-emphasis beyond conventional amplitude compensation of ISI, whereby phase pre-emphasis for compensating data-dependent jitter (DDJ) is introduced. DDJ can be addressed by exploiting the relationship between the data sequence and the timing deviation. Phase pre-emphasis improves the signal integrity with little additional power consumption in the transmitter and with no cross-talk penalty.

    摘要翻译: 在高速串行链路的上下文中,使用相位预失真执行的数据相关抖动补偿技术。 广泛考虑的是将预加重的概念扩展超出ISI的常规幅度补偿,由此引入用于补偿依赖于数据的抖动(DDJ)的相位预加重。 可以通过利用数据序列与时序偏差之间的关系来解决DDJ。 相位预加重提高了信号完整性,在发射机中几乎没有额外的功耗,没有串扰。

    Voltage-controlled delay circuit using second-order phase interpolation
    10.
    发明申请
    Voltage-controlled delay circuit using second-order phase interpolation 失效
    使用二阶相位插值的电压控制延迟电路

    公开(公告)号:US20050093595A1

    公开(公告)日:2005-05-05

    申请号:US10697751

    申请日:2003-10-30

    IPC分类号: H03L7/081 H03L7/06

    CPC分类号: H03L7/0812

    摘要: Phase interpolation techniques for voltage-controlled delay line (VCDL) implementation are provided. The techniques of the invention may employ a second-order phase interpolation topology to improve tuning range performance of the VCDL over process and temperature variation. In one aspect of the invention, the technique may use a complementary input signal to set an absolute 180-degree phase reference. As a result, the maximum tuning range of 180 degrees can be achieved regardless of internal delay variation.

    摘要翻译: 提供电压延迟线(VCDL)实现的相位插值技术。 本发明的技术可以采用二阶相位插值拓扑来改善VCDL过程和温度变化的调谐范围性能。 在本发明的一个方面中,该技术可以使用互补输入信号来设置绝对180度相位参考。 结果,可以实现180度的最大调谐范围,而不管内部延迟变化。