Display adapter for virtual VGA support in XGA native mode
    1.
    发明授权
    Display adapter for virtual VGA support in XGA native mode 失效
    显示适配器,用于XGA纯模式下的虚拟VGA支持

    公开(公告)号:US5477242A

    公开(公告)日:1995-12-19

    申请号:US177105

    申请日:1994-01-03

    CPC分类号: G09G5/363

    摘要: Method and apparatus for enabling an XGA display adapter selectively to support VGA graphics mode virtualization during native mode operation of the adapter by rendering VGA graphics assist hardware and certain VGA registers accessible. In a preferred embodiment, the invention comprises an XGA display adapter which includes a host interface for interfacing the display adapter with a central processing unit (CPU) of a personal computer (PC), VGA graphics assist hardware for performing VGA graphics assist functions, a memory controller for reading and writing a video memory of the PC as requested by the CPU during video memory accesses, and a display interface for generating control and timing signals to a display of the PC. The XGA display adapter also includes a XGA Operating Mode Register having three control bits which can be written by applications software selectively to enable or disable the virtual VGA function of the present invention. When the virtual VGA function is enabled, logic circuitry within the host interface examines the CPU address associated with each video memory access to determine whether the access comprises a virtual VGA memory access, rather than a native memory access. If so, the host interface routes CPU address and any data to be written to the video memory at that address, which performs the appropriate graphics assist operations on the address and/or data to enable the requested operation accurately to be performed on a virtual VGA memory buffer portion of the video memory by the memory controller.

    摘要翻译: 用于使XGA显示适配器通过渲染VGA图形辅助硬件和某些VGA寄存器可访问的本地模式操作期间,有选择地支持VGA图形模式虚拟化的方法和装置。 在优选实施例中,本发明包括一个XGA显示适配器,其包括用于将显示适配器与个人计算机(PC)的中央处理单元(CPU)接口的主机接口,用于执行VGA图形辅助功能的VGA图形辅助硬件, 存储器控制器,用于在视频存储器访问期间根据CPU请求读取和写入PC的视频存储器;以及显示接口,用于向PC的显示器生成控制和定时信号。 XGA显示适配器还包括具有三个控制位的XGA操作模式寄存器,其可以由应用软件选择性地写入以启用或禁用本发明的虚拟VGA功能。 当启用虚拟VGA功能时,主机接口内的逻辑电路检查与每个视频存储器访问相关联的CPU地址,以确定访问是否包含虚拟VGA存储器访问,而不是本地存储器访问。 如果是这样,主机接口将CPU地址和要写入到该地址的视频存储器的任何数据进行路由,该地址和/或数据对地址和/或数据执行适当的图形辅助操作,以使所请求的操作准确地在虚拟VGA 存储器控制器的视频存储器的存储器缓冲部分。

    Hardware XOR sprite for computer display systems
    2.
    发明授权
    Hardware XOR sprite for computer display systems 失效
    用于计算机显示系统的硬件XOR精灵

    公开(公告)号:US5471570A

    公开(公告)日:1995-11-28

    申请号:US176128

    申请日:1993-12-30

    CPC分类号: G09G5/08 G09G5/06

    摘要: Method and apparatus for adjusting the color of the sprite in display systems, so that the sprite is always distinctively visible irrespective of the underlying displayed data. A palette DAC of a display system is provided with sprite control logic, which derives the color of a sprite to be overlaid on an image displayed on a video display unit of a display system by inverting only the most significant bit (MSB) of each of the red, green and blue pixel data components of the underlying image. In a preferred embodiment, the sprite control logic circuit comprises first, second and third multiplexors (MUXes) each having a first input connected to receive the MSB of the red, green and blue pixel data components of the underlying image, respectively, and a second input connected to receive the output of first, second and third XOR gates, respectively. Each of the first, second and third XOR gates similarly have a first input connected to receive the MSB of the red, green and blue pixel data components of the underlying image, respectively, and a second input connected to receive sprite data from a sprite RAM, which sprite data represents a sprite character to be overlaid on the displayed image.

    摘要翻译: 用于调整显示系统中的精灵颜色的方法和装置,使得子画面总是可视地显示,而不管底层显示的数据如何。 显示系统的调色板DAC具有子画面控制逻辑,该精灵控制逻辑通过仅反转显示系统的视频显示单元的最高有效位(MSB)来导出要重叠在显示系统的视频显示单元上的图像上的子画面的颜色 底层图像的红色,绿色和蓝色像素数据组件。 在优选实施例中,子画面控制逻辑电路包括第一,第二和第三多路复用器(MUX),每个多路复用器(MUX)分别具有连接以分别接收底层图像的红色,绿色和蓝色像素数据分量的MSB的第一输入, 输入端分别接收第一,第二和第三异或门的输出。 第一,第二和第三异或门中的每一个类似地具有连接以分别接收底层图像的红色,绿色和蓝色像素数据分量的MSB的第一输入和连接以从子画面RAM接收精灵数据的第二输入 ,哪个子画面数据表示要覆盖在显示图像上的子画面字符。

    Raster scan digital display system
    4.
    发明授权
    Raster scan digital display system 失效
    光栅扫描数字显示系统

    公开(公告)号:US4901062A

    公开(公告)日:1990-02-13

    申请号:US282919

    申请日:1988-12-06

    IPC分类号: G09G5/06 G09G5/391

    CPC分类号: G09G5/06 G09G5/391

    摘要: An all points addressable raster scan graphics display system is operable in two modes. In the first mode, data is extracted from a refresh store, serialized, modified, and applied to a display device at a first frequency. In the second mode, data is extracted from the refresh store, serialized and partially modified at said first frequency, but it is then further modified and passed to the display device at an even sub harmonic, for example half, of the first frequency. The further modification includes concatenation of successive groups of display data bits. Accordingly, with the raster scan device operating at a constant scan velocity, the first mode provides a high picture element definition but relatively low color definition display, and the second mode provides a display with an even submultiple, for example half, the picture element definition but considerably greater color definition.

    摘要翻译: 所有点可寻址光栅扫描图形显示系统可在两种模式下操作。 在第一模式中,从刷新存储提取数据,以第一频率序列化,修改和应用于显示设备。 在第二模式中,从刷新存储提取数据,以所述第一频率进行串行化和部分修改,然后进一步修改并以偶次谐波(例如,第一频率的一半)传递给显示设备。 进一步的修改包括连续显示数据位组的级联。 因此,在光栅扫描装置以恒定的扫描速度工作的情况下,第一模式提供了高的图像元素定义,但是相对较低的颜色清晰度显示,并且第二模式提供具有甚至多个像素的显示,例如图像元素定义的一半 但颜色定义相当大。

    Programmable peripheral processing controller with mode-selectable
address register sequencing
    5.
    发明授权
    Programmable peripheral processing controller with mode-selectable address register sequencing 失效
    具有模式可选地址寄存器排序的可编程外设处理控制器

    公开(公告)号:US4476522A

    公开(公告)日:1984-10-09

    申请号:US241902

    申请日:1981-03-09

    摘要: A peripheral processing controller controls time-shared access to a memory by specialized peripheral devices. The specialized peripheral devices process data independently of a central processor that simply supervises the system. The peripheral processing controller uses predetermined modes of memory space allocation for the various peripheral devices. A memory address register in the controller is assigned to each peripheral device. In addition, each MAR has one or more predefined modes of memory space allocation and, when active, controls memory access for its assigned peripheral device. The modes also define the size of the block of space allocated and whether memory access scrolls through various blocks of space or jumps between blocks of space. The controller also detects when a peripheral device has consumed all the space in a block. Further, for those MAR's having more than one mode of space allocation, the controller selects the mode appropriate for the peripheral device requesting access to the memory.

    摘要翻译: 外围处理控制器通过专门的外围设备控制对存储器的共享访问。 专门的外围设备独立于仅管理系统的中央处理器处理数据。 外围处理控制器使用各种外围设备的预定模式的存储器空间分配。 控制器中的存储器地址寄存器被分配给每个外围设备。 另外,每个MAR具有一个或多个预定义的存储器空间分配模式,并且当被激活时控制其分配的外围设备的存储器访问。 这些模式还定义了分配的空间块的大小以及存储器访问是否滚动到各种空间块或在空间块之间跳转。 控制器还可以检测外围设备何时消耗块中的所有空间。 此外,对于具有多于一种空间分配模式的那些MAR,控制器选择适合于请求存取存储器的外围设备的模式。

    Digital display system
    7.
    发明授权
    Digital display system 失效
    数字显示系统

    公开(公告)号:US4727362A

    公开(公告)日:1988-02-23

    申请号:US631043

    申请日:1984-07-16

    CPC分类号: G09G1/167 G09G1/285 G09G1/165

    摘要: A digital display system includes a monitor arranged to receive digital display data and synchronizing signals to develop displays on a cathode ray tube. The monitor is switched between different line structure and/or color definition modes in response to the polarity of one of the vertical or horizontal synchronizing signals trains. A circuit receives this train to provide control signals to the horizontal time base and/or a color signal code converter. The time base control signal, in accordance with its binary value, controls the frequency of the time base. The color converter, in response to the control signals, either passes color signals received in parallel over six input lines without change to the cathode ray tube drive circuits or converts color signals on four of the input lines to output signals on the six lines to the drive circuits.

    摘要翻译: 一种数字显示系统包括:监视器,被配置为接收数字显示数据并同步信号以在阴极射线管上显影。 响应于垂直或水平同步信号列之一的极性,监视器在不同的线结构和/或颜色定义模式之间切换。 电路接收该列车以向水平时基提供控制信号和/或彩色信号码转换器。 时基控制信号根据其二进制值控制时基的频率。 颜色转换器响应于控制信号,可以通过六条输入线并行接收的颜色信号,而不改变到阴极射线管驱动电路,或者将四条输入线上的色信号转换成6条线上的输出信号 驱动电路。

    Raster scan display system
    8.
    发明授权
    Raster scan display system 失效
    光栅扫描显示系统

    公开(公告)号:US4580135A

    公开(公告)日:1986-04-01

    申请号:US522895

    申请日:1983-08-12

    CPC分类号: G09G5/40

    摘要: A raster scan display system includes a plurality of storage maps. These maps are addressable in either of two modes. In the first mode each map contains bit mapped data and the maps are addressed together to provide color signals from which color video signals are derived. In the second mode, one map contains character representing data and a further map, character display dot patterns. In this mode the first map is addressed to provide partial addresses for the further map. These partial addresses are combined with row scan data signals to access the further map from which the character display dot data is used to generate the video signals.

    摘要翻译: 光栅扫描显示系统包括多个存储映射。 这些地图可以以两种模式中的任何一种来寻址。 在第一模式中,每个地图包含位映射数据,并将地图一起寻址以提供从其导出彩色视频信号的彩色信号。 在第二模式中,一个地图包含表示数据的字符和另外的地图,字符显示点图案。 在这种模式下,寻址第一张地图以提供进一步地图的部分地址。 这些部分地址与行扫描数据信号组合以访问另外的地图,使用字符显示点数据来生成视频信号。

    Digital display system
    9.
    再颁专利

    公开(公告)号:USRE33916E

    公开(公告)日:1992-05-05

    申请号:US443187

    申请日:1989-11-30

    IPC分类号: G09G1/16 G09G1/28

    CPC分类号: G09G1/167 G09G1/285 G09G1/165

    摘要: A digital display system includes a monitor arranged to receive digital display data and synchronizing signals to develop displays on a cathode ray tube. The monitor is switched between different line structure and/or color definition modes in response to the polarity of one of the vertical or horizontal synchronizing signals trains. A circuit receives this train to provide control signals to the horizontal time base and/or a color signal code converter. The time base control signal, in accordance with its binary value, controls the frequency of the time base. The color converter, in response to the control signals, either passes color signals received in parallel over six input lines without change to the cathode ray tube drive circuits or converts color signals on four of the input lines to output signals on the six lines to the drive circuits.

    Multiple image facsimile
    10.
    发明授权
    Multiple image facsimile 失效
    多幅图像传真

    公开(公告)号:US4342052A

    公开(公告)日:1982-07-27

    申请号:US159740

    申请日:1980-06-16

    IPC分类号: H04N1/23 H04N1/387 H04N1/38

    CPC分类号: H04N1/3875

    摘要: The apparatus shown herein controls a facsimile system to reduce four source documents and print all four reduced copies on a single copy page. The facsimile system prints one of the source documents in each quadrant of the copy document. The images of the source documents are reduced in the horizontal dimension by discarding every other picture element in the scan image. The images are reduced in the vertical dimension by increasing the scanner speed so that the size of the picture element in the vertical dimension is doubled. At the receiver, two scanned and reduced images will be printed on the left-hand half of the copy document. Subsequently, two additional scanned and reduced images are printed on the right-hand half of the copy document. When printing the right-hand half of the copy document, the printer must be referenced to start printing at the horizontal mid-page of the copy document rather than the left-hand edge of the copy document.

    摘要翻译: 本文所示的装置控制传真系统以减少四个源文档并在单个复印页面上打印所有四个缩小的副本。 传真系统在复印文件的每个象限中打印出一个源文档。 通过丢弃扫描图像中的每个其他像素,源文档的图像在水平维度上减小。 图像通过增加扫描仪速度在垂直尺寸上减小,使得垂直尺寸上的图像元素的尺寸加倍。 在接收机上,两张扫描和缩小的图像将打印在副本文档的左半部分。 随后,在副本文档的右半部分打印另外两个扫描和缩小的图像。 当打印副本文档的右半部分时,必须引用打印机,在复印文档的水平中间页开始打印,而不是复印文档的左边缘。