SOI STRUCTURES INCLUDING A BURIED BORON NITRIDE DIELECTRIC
    4.
    发明申请
    SOI STRUCTURES INCLUDING A BURIED BORON NITRIDE DIELECTRIC 审中-公开
    SOI结构包括一个BURIED BORON NITRIDE DIELECTRIC

    公开(公告)号:US20130196483A1

    公开(公告)日:2013-08-01

    申请号:US13604004

    申请日:2012-09-05

    IPC分类号: H01L21/30

    摘要: Boron nitride is used as a buried dielectric of an SOI structure including an SOI layer and a handle substrate. The boron nitride is located between an SOI layer and a handle substrate. Boron nitride has a dielectric constant and a thermal expansion coefficient close to silicon dioxide. Yet, boron nitride has a wet as well as a dry etch resistance that is much better than silicon dioxide. In the SOI structure, there is a reduced material loss of boron nitride during multiple wet and dry etches so that the topography and/or bridging are not an obstacle for device integration. Boron nitride has a low dielectric constant so that devices built in SOI active regions do not suffer from a charging effect.

    摘要翻译: 氮化硼被用作包括SOI层和手柄衬底的SOI结构的掩埋电介质。 氮化硼位于SOI层和手柄基板之间。 氮化硼具有接近二氧化硅的介电常数和热膨胀系数。 然而,氮化硼具有比二氧化硅好得多的湿润以及耐干蚀刻性。 在SOI结构中,在多次湿和干蚀刻期间氮化硼的材料损失减少,使得形貌和/或桥接不是器件集成的障碍。 氮化硼具有低介电常数,使得内置在SOI有源区中的器件不会带来充电效应。

    SIMPLIFIED VERTICAL ARRAY DEVICE DRAM/eDRAM INTEGRATION
    5.
    发明申请
    SIMPLIFIED VERTICAL ARRAY DEVICE DRAM/eDRAM INTEGRATION 审中-公开
    简化的垂直阵列设备DRAM / eDRAM集成

    公开(公告)号:US20090159947A1

    公开(公告)日:2009-06-25

    申请号:US11959886

    申请日:2007-12-19

    IPC分类号: H01L27/108

    CPC分类号: H01L27/10891

    摘要: The present invention provides a semiconductor structure that includes an active wordline located above a semiconductor memory device and a passive wordline located adjacent to said active wordline and above an active area of a substrate. In accordance with the present invention, the passive wordline is separated from the active area by a pad nitride. The present invention also provides a design structure of the semiconductor structure, wherein the design structure is embodied in a machine readable medium.

    摘要翻译: 本发明提供一种半导体结构,其包括位于半导体存储器件上方的有源字线和位于所述有源字线附近并位于衬底的有效区域之上的被动字线。 根据本发明,被动字线通过衬垫氮化物与有源区分离。 本发明还提供了半导体结构的设计结构,其中设计结构体现在机器可读介质中。