公开(公告)号：US06696916B2

公开(公告)日：2004-02-24

申请号：US09746373

申请日：2000-12-22

申请人： Delfo Sanfilippo ,  Davide Patti

发明人： Delfo Sanfilippo ,  Davide Patti

IPC分类号： H01C1012

CPC分类号： H01L28/20 ,  H01C7/1013 ,  H01C17/075 ,  H01L27/0802

摘要： The high-voltage resistor is of the vertical type, and is formed in a chip which includes a high-voltage region and a low-voltage region superimposed on the high-voltage region, both having a first conductivity type. An isolation region, at least partially buried, extends between the high-voltage region and the low-voltage region, and delimits a vertical resistive region connecting the high-voltage region to the low-voltage region.

摘要翻译： 高压电阻器是垂直型的，并且形成在包括叠加在高电压区域上的高电压区域和低电压区域的芯片中，两者都具有第一导电类型。 至少部分埋置的隔离区域在高电压区域和低压区域之间延伸，并且限定将高电压区域连接到低电压区域的垂直电阻区域。

公开(公告)号：US06331470B1

公开(公告)日：2001-12-18

申请号：US09580364

申请日：2000-05-26

申请人： Delfo Sanfilippo ,  Salvatore Leonardi

发明人： Delfo Sanfilippo ,  Salvatore Leonardi

IPC分类号： H01L21331

CPC分类号： H01L21/76264 ,  H01L21/76281

摘要： A manufacturing process is carried out starting from an SOI type wafer including a top silicon layer and a bottom silicon layer separated from each other by a buried silicon dioxide layer. In the top layer, a LOCOS type sacrificial region is formed and then removed, so as to form a cavity that extends in depth as far as the buried oxide layer. Subsequently, the cavity is filled with epitaxial or polycrystalline silicon, so as to form a power region extending between the top surface and the bottom surface of the wafer; then lateral insulation regions are formed that insulate the power region from the circuitry region.

摘要翻译： 从包括通过掩埋二氧化硅层彼此分离的顶部硅层和底部硅层的SOI型晶片开始进行制造工艺。 在顶层中，形成LOCOS型牺牲区，然后去除，以形成深度延伸到掩埋氧化物层的空腔。 随后，用外延或多晶硅填充空腔，以形成在晶片的顶表面和底表面之间延伸的功率区域; 然后形成将功率区域与电路区域绝缘的横向绝缘区域。

公开(公告)号：US06441445B1

公开(公告)日：2002-08-27

申请号：US09413740

申请日：1999-10-06

申请人： Salvatore Leonardi ,  Davide Patti ,  Delfo Sanfilippo

发明人： Salvatore Leonardi ,  Davide Patti ,  Delfo Sanfilippo

IPC分类号： H01L2976

CPC分类号： H01L29/7802 ,  H01L21/823462

摘要： The integrated circuit device has a vertical conduction structure in which a region, which contains the base of a bipolar transistor, has zones having different concentrations. The concentrations are lower where the flow of charges is more intense and higher elsewhere. A high gain of the bipolar transistor and a low resistance of the electronic switch in conduction are thus obtained.

摘要翻译： 集成电路器件具有垂直导电结构，其中包含双极晶体管的基极的区域具有不同浓度的区域。 在电荷流动更强烈和其他地方较高的地方，浓度较低。 因此获得双极晶体管的高增益和电子开关在导通中的低电阻。