公开(公告)号：US08782289B2

公开(公告)日：2014-07-15

申请号：US12996996

申请日：2008-06-10

Applicant: David L. Matthews ,  Hubert E. Brinkmann ,  James Xuan Dinh ,  Dwight D. Riley ,  Paul V. Brownell

Inventor： David L. Matthews ,  Hubert E. Brinkmann ,  James Xuan Dinh ,  Dwight D. Riley ,  Paul V. Brownell

IPC: G06F3/00 ,  G06F13/00 ,  H04L12/28

CPC classification number: H04L12/28 ,  G06F13/4027

Abstract: In one embodiment, a computer system, comprises at least one host node, at least one input/output node coupled to the host node, at least one multi-function device coupled to the input/output node via a switch, and a middle manager processor comprising logic to block an enumeration process in a host node for the multi-function devices behind the switch hierarchy, initiate an enumeration process for the multi-function devices in a manager processor separate from the host node, store a routing table for the switch hierarchy in a memory module coupled to the manager processor, and allocate, in the manager processor, endpoint device resources to the host node.

Abstract translation: 在一个实施例中，计算机系统包括至少一个主机节点，耦合到主机节点的至少一个输入/输出节点，经由交换机耦合到输入/输出节点的至少一个多功能设备，以及中间管理器 处理器包括用于阻止主机节点中用于交换机层级之后的多功能设备的枚举过程的逻辑，为与主机节点分离的管理器处理器中的多功能设备启动枚举过程，存储用于交换机的路由表 耦合到管理器处理器的存储器模块中的层次结构，并且在管理器处理器中将端点设备资源分配给主机节点。

公开(公告)号：US20120124186A1

公开(公告)日：2012-05-17

申请号：US12946540

申请日：2010-11-15

Applicant: Theodore F. Emerson ,  David F. Heinrich ,  Don A. Dykes ,  Robert L. Noonan ,  Dwight D. Riley

Inventor： Theodore F. Emerson ,  David F. Heinrich ,  Don A. Dykes ,  Robert L. Noonan ,  Dwight D. Riley

IPC: G06F15/173

CPC classification number: H04L41/022 ,  H04L41/044

Abstract: Methods, devices, and systems for multiple host management are provided. An example of a method for multiple host management includes a multiple host management device managing a plurality of host instances. The multiple host management device can provide each of the plurality of host instances with a plurality of input/output (I/O) functionalities.

Abstract translation: 提供了多主机管理的方法，设备和系统。 用于多主机管理的方法的示例包括管理多个主机实例的多主机管理装置。 多主机管理设备可以向多个主机实例中的每一个提供多个输入/输出（I / O）功能。

公开(公告)号：US08176204B2

公开(公告)日：2012-05-08

申请号：US11450491

申请日：2006-06-09

Applicant: Dwight D. Riley

Inventor： Dwight D. Riley

IPC: G06F15/173

CPC classification number: H04L45/00 ,  H04L49/10 ,  H04L49/102 ,  H04L49/15 ,  H04L49/25 ,  H04L49/358

Abstract: The present disclosure describes a system and method for multi-host extension of a single-host device comprising a network switch fabric that comprises a rooted hierarchical bus, a first compute node coupled to the network switch fabric, and an input/output (I/O) node coupled to the network switch fabric, the I/O node comprising a network switch fabric interface and a real single-host device. The network switch fabric interface creates a first virtual device mapped to the real single-host device. The first virtual device allows the first compute node to access the real single-host device.

Abstract translation: 本公开描述了一种用于单主机设备的多主机扩展的系统和方法，包括网络交换结构，该网络交换结构包括根分层总线，耦合到网络交换结构的第一计算节点，以及输入/输出（I / O）节点，所述I / O节点包括网络交换结构接口和真实的单主机设备。 网络交换矩阵接口创建映射到真实单主机设备的第一虚拟设备。 第一虚拟设备允许第一计算节点访问真实的单主机设备。

公开(公告)号：US07099966B2

公开(公告)日：2006-08-29

申请号：US10184164

申请日：2002-06-28

Applicant: Michael Y. Chan ,  Dwight D. Riley

Inventor： Michael Y. Chan ,  Dwight D. Riley

IPC: G06F13/00

CPC classification number: G06F13/4068

Abstract: A switching technique allows multiple interconnect bus devices to be connected to a single bus segment, even if the interconnect bus protocol only allows a one of the interconnect devices to be connected at any time. Each of the interconnect devices is connected to the interconnect bus segment with a switch, such that the interconnect device is electrically isolated from the interconnect bus segment when the switch is open. An interconnect sourcing agent connected to the interconnect bus segment controls the switches, closing the switch for one of the interconnect devices when a transaction is destined for that interconnect device, opening all of the other switches so that only one device is connected to the bus at any time.

Abstract translation: 切换技术允许多个互连总线设备连接到单个总线段，即使互连总线协议仅允许在任何时间连接互连设备之一。 每个互连设备通过开关连接到互连总线段，使得当开关断开时，互连设备与互连总线段电隔离。 连接到互连总线段的互连采购代理控制交换机，当事务指定给该互连设备时，关闭用于互连设备之一的交换机，打开所有其他交换机，使得仅一个设备连接到总线 任何时候。

公开(公告)号：US5875351A

公开(公告)日：1999-02-23

申请号：US94218

申请日：1998-06-09

Applicant: Dwight D. Riley

Inventor： Dwight D. Riley

IPC: G06F13/12 ,  G06F13/28 ,  G06F13/00

CPC classification number: G06F13/28 ,  G06F13/126

Abstract: A distributed direct memory access (DMA) architecture where greater than seven DMA channels are provided and utilized. Alternative methods are disclosed for paging or swapping DMA channels so that more than seven may exist in a computer system, but only seven may be available at a time to remain compatible with conventional DMA controller software. In one method, channels may be assigned identical addresses, with one enabled at one time. In another method, channels are assigned unique addresses but the DMA master addresses only a subset of the total number of channels so that up to seven are available to compatible software at any one time.

Abstract translation: 分布式直接存储器访问（DMA）架构，其中提供和利用大于7个DMA通道。 公开了用于寻呼或交换DMA通道的替代方法，使得计算机系统中可能存在七个以上，但是一次只有七个可能可用于与常规DMA控制器软件保持兼容。 在一种方法中，信道可以被分配相同的地址，一次启用。 在另一种方法中，通道被分配唯一的地址，但是DMA主器件只能处理通道总数的一个子集，因此可以在任何一个时间多达七个可用于兼容的软件。

公开(公告)号：US5838993A

公开(公告)日：1998-11-17

申请号：US639879

申请日：1996-04-26

Applicant: Dwight D. Riley ,  Robert C. Elliott

Inventor： Dwight D. Riley ,  Robert C. Elliott

IPC: G06F13/12 ,  G06F13/28 ,  G06F13/20

CPC classification number: G06F13/28 ,  G06F13/126

Abstract: A distributed direct memory access (DMA) architecture where DMA controllers are modified to create isolated DMA channels. Each isolated channel includes its own set of uniquely addressable registers which provide functional compatibility with conventional DMA controllers. A DMA master interacts compatibly with the computer system and transparently communicates special cycles to the isolated DMA channels to cause the distributed DMA architecture to appear as the DMA controllers. The DMA master spawns special cycles to the isolated channels for sharing common write data with multiple channels and merging read data into a single DMA controller compatible register. Channel 4 cascading is also handled via tracking registers and special cycles to maintain disable and masking functionality of channel 4 as it effects channels 0-3.

Abstract translation: 分布式直接存储器访问（DMA）架构，其中DMA控制器被修改以创建隔离的DMA通道。 每个隔离通道都包括其自己的一组唯一可寻址寄存器，提供与常规DMA控制器的功能兼容性。 DMA主机与计算机系统兼容交互，并将特殊周期透明地传送到隔离的DMA通道，以使分布式DMA架构显示为DMA控制器。 DMA主机为隔离通道产生特殊周期，以共享具有多个通道的通用写入数据，并将读取数据合并到单个DMA控制器兼容寄存器中。 通道4级联也通过跟踪寄存器和特殊周期来处理，以保持通道4的禁用和屏蔽功能，因为它影响通道0-3。

公开(公告)号：US5765024A

公开(公告)日：1998-06-09

申请号：US639881

申请日：1996-04-26

Applicant: Dwight D. Riley

Inventor： Dwight D. Riley

IPC: G06F13/12 ,  G06F13/28 ,  G06F15/40

CPC classification number: G06F13/28 ,  G06F13/126

Abstract: A distributed direct memory access (DMA) architecture where greater than seven DMA channels are provided and utilized. Alternative methods are disclosed for paging or swapping DMA channels so that more than seven may exist in a computer system, but only seven may be available at a time to remain compatible with conventional DMA controller software. In one method, channels may be assigned identical addresses, with one enabled at one time. In another method, channels are assigned unique addresses but the DMA master addresses only a subset of of the total number of channels so that up to seven are available to compatible software at any one time.

Abstract translation: 分布式直接存储器访问（DMA）架构，其中提供和利用大于7个DMA通道。 公开了用于寻呼或交换DMA通道的替代方法，使得计算机系统中可能存在七个以上，但是一次只能有七个可用于与常规DMA控制器软件保持兼容。 在一种方法中，信道可以被分配相同的地址，一次启用。 在另一种方法中，通道被分配唯一的地址，但是DMA主器件只能处理通道总数的一个子集，所以在任何一个时间，多达七个可用于兼容的软件。

公开(公告)号：US08316377B2

公开(公告)日：2012-11-20

申请号：US11851306

申请日：2007-09-06

Applicant: Dwight D. Riley

Inventor： Dwight D. Riley

IPC: G06F3/00 ,  G06F9/44 ,  G06F9/46 ,  G06F13/00

CPC classification number: H04L49/35 ,  H04L49/65

Abstract: Systems and methods of sharing legacy devices in a multi-host environment are disclosed. An exemplary method for sharing legacy devices in a multi-host environment includes receiving device information from a legacy device, the device information identifying a target within a virtual machine. The method also includes encapsulating the device information into a corresponding bus transaction for a network switch fabric. The method also includes routing the bus transaction over the network switch fabric in the virtual machine to a host within the virtual machine.

Abstract translation: 公开了在多主机环境中共享传统设备的系统和方法。 用于在多主机环境中共享传统设备的示例性方法包括从传统设备接收设备信息，所述设备信息标识虚拟机内的目标。 该方法还包括将设备信息封装成用于网络交换结构的相应总线事务。 该方法还包括将虚拟机中的网络交换机结构上的总线事务路由到虚拟机内的主机。

公开(公告)号：US08291145B2

公开(公告)日：2012-10-16

申请号：US10915174

申请日：2004-08-10

Applicant: Dwight D. Riley

Inventor： Dwight D. Riley

IPC: G06F3/00 ,  G06F5/00 ,  G06F13/12 ,  G06F13/14 ,  G06F13/36 ,  G06F13/00 ,  G01R31/08

CPC classification number: G06F13/4045

Abstract: An apparatus and a method for setting a primary port on a PCI multi-port bridge. More specifically, there is provided a method that comprises detecting a configuration signal at the PCI multi-port bridge and automatically setting the primary port on the PCI multi-port bridge based on the configuration signal. A system for implementing the method is also provided.

Abstract translation: 一种在PCI多端口桥上设置主端口的装置和方法。 更具体地，提供了一种方法，其包括检测PCI多端口网桥上的配置信号，并基于配置信号自动设置PCI多端口网桥上的主端口。 还提供了一种用于实现该方法的系统。

公开(公告)号：US08174977B2

公开(公告)日：2012-05-08

申请号：US11825492

申请日：2007-07-06

Applicant: Paul V. Brownell ,  David L. Matthews ,  James Xuan Dinh ,  Hubert E. Brinkmann ,  Dwight D. Riley ,  Hahn Vo Norden ,  Kenneth T. Chin

Inventor： Paul V. Brownell ,  David L. Matthews ,  James Xuan Dinh ,  Hubert E. Brinkmann ,  Dwight D. Riley ,  Hahn Vo Norden ,  Kenneth T. Chin

IPC: H04L12/26

CPC classification number: H04L47/263 ,  H04L41/08 ,  H04L47/18 ,  H04L47/215 ,  H04L47/30 ,  H04L47/39 ,  H04L2212/00

Abstract: A network node within a network includes a first receive buffer, first buffer management, a second receive buffer and second buffer management. The first buffer management performs link level credit based flow control for network packets that the first buffer management places in the first receive buffer. The second buffer management performs end-to-end credit based flow control for network packets that the second buffer management receives from the first receive buffer and processes before placing data in the second receive buffer.

Abstract translation: 网络内的网络节点包括第一接收缓冲器，第一缓冲器管理，第二接收缓冲器和第二缓冲器管理。 第一缓冲器管理对第一缓冲器管理放置在第一接收缓冲器中的网络分组执行基于链路级信用的流量控制。 第二缓冲器管理对第二缓冲器管理从第一接收缓冲器接收的网络分组执行基于端到端的信用流量控制，并且在将数据置于第二接收缓冲器之前进行处理。