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1.发明授权System and method for detecting short, opens and connected pins on a printed circuit board using automatic test equipment 失效使用自动测试设备检测印刷电路板上的短路，开路和连接引脚的系统和方法
公开(公告)号：US5504432A
公开(公告)日：1996-04-02
申请号：US114592
申请日：1993-08-31
IPC分类号： G01R31/02 , G01R31/28 , G01R31/3183 , G01R31/319
CPC分类号： G01R31/318342 , G01R31/2812 , G01R31/31915 , G01R31/3191
摘要： An automatic circuit board tester for testing for shorts, opens, and interconnected pins or nodes on a circuit board. The tester first classifies the nodes as being in one of three categories based upon the design of the board and the intended interconnection of the nodes. The categories of nodes are: (1) connected to ground; (2) interconnected to all other nodes in the test group; or (3) isolated from all other nodes. The circuit board tester has a testhead containing a plurality of test channels, each configured to be coupled to a node on the circuit board. The testhead utilizes a digital signal from a digital driver to drive the node at a predetermined voltage and a digital receiver to read the node voltage to determine if it is coupled to ground. Each test channel also includes a switch to connect the digital driver and receiver to the test node as well as a ground switch to selectively couple the node to ground. Various combinations of switch positions and testing sequences enables the circuit board tester to test all node connections and to ensure that the physical embodiment of the circuit board accurately reflects the circuit board design.
摘要翻译： 一种用于测试电路板上短路，开路和互连引脚或节点的自动电路板测试仪。 测试仪首先根据电路板的设计和节点的预期互连，将节点分类为三类之一。 节点类别有：（1）连接到地面; （2）与测试组中的所有其他节点互连; 或（3）与所有其他节点隔离。 电路板测试器具有包含多个测试通道的测试头，每个测试通道被配置为耦合到电路板上的节点。 测试头利用来自数字驱动器的数字信号以预定电压驱动节点，并且数字接收器读取节点电压以确定其是否耦合到地。 每个测试通道还包括将数字驱动器和接收器连接到测试节点的开关以及用于选择性地将节点耦合到地的接地开关。 开关位置和测试序列的各种组合使得电路板测试仪能够测试所有节点连接，并确保电路板的物理实施例精确地反映电路板设计。
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2.发明授权System and method for detecting shorts, opens and connected pins on a printed circuit board using automatic equipment 失效使用自动设备检测印刷电路板上的短路，开路和连接引脚的系统和方法
公开(公告)号：US5977775A
公开(公告)日：1999-11-02
申请号：US559905
申请日：1995-11-17
IPC分类号： G01R31/02 , G01R31/28 , G01R31/3183 , G01R31/319 , G01R27/26
CPC分类号： G01R31/318342 , G01R31/2812 , G01R31/31915 , G01R31/3191
摘要： An automatic circuit board tester for testing for shorts, opens, and interconnected pins or nodes on a circuit board. The tester first classifies the nodes as being in one of three categories based upon the design of the board and the intended interconnection of the nodes. The categories of nodes are: (1) connected to ground; (2) interconnected to all other nodes in the test group; or (3) isolated from all other nodes. The circuit board tester has a testhead containing a plurality of test channels, each configured to be coupled to a node on the circuit board. The testhead utilizes a digital signal from a digital driver to drive the node, at a predetermined voltage and a digital receiver to read the node voltage to determine if it is coupled to ground. Each test channel also includes a switch to connect the digital driver and receiver to the test node as well as a ground switch to selectively couple the node to ground. Various combinations of switch positions and testing sequences enables the circuit board tester to test all node connections and to ensure that the physical embodiment of the circuit board accurately reflects the circuit board design.
摘要翻译： 一种用于测试电路板上短路，开路和互连引脚或节点的自动电路板测试仪。 测试仪首先根据电路板的设计和节点的预期互连，将节点分类为三类之一。 节点类别有：（1）连接到地面; （2）与测试组中的所有其他节点互连; 或（3）与所有其他节点隔离。 电路板测试器具有包含多个测试通道的测试头，每个测试通道被配置为耦合到电路板上的节点。 测试头利用来自数字驱动器的数字信号来驱动节点，以预定电压和数字接收机读取节点电压，以确定其是否耦合到地。 每个测试通道还包括将数字驱动器和接收器连接到测试节点的开关以及用于选择性地将节点耦合到地的接地开关。 开关位置和测试序列的各种组合使得电路板测试仪能够测试所有节点连接，并确保电路板的物理实施例精确地反映电路板设计。
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3.发明授权System and method for detecting shorts, opens and connected pins on a printed circuit board using automatic test equipment 失效使用自动测试设备检测印刷电路板上的短路，开路和连接引脚的系统和方法公开(公告)号：US06291978B1
公开(公告)日：2001-09-18
申请号：US09361369
申请日：1999-07-26
IPC分类号： G01R3102
CPC分类号： G01R31/318342 , G01R31/2812 , G01R31/3191 , G01R31/31915
摘要： A method for testing node interconnection on a circuit board. The method utilizes an automated test system having at least one test channel, wherein each test channel has a digital driver with a first input and a first output, and a digital receiver with a second output and a second input. The second input of the receiver is coupled to the first output of the driver and to a test probe. The test probe is configured to couple the driver and receiver to one of a plurality of nodes on a circuit board. During a node interconnection test, the driver of a first test channel applies a test signal to a selected node of the plurality of nodes. A predetermined amount of time after application of the test signal, the receiver of the first test channel reads a node voltage of the selected node. The node voltage is then compared to a predetermined threshold voltage of the receiver of the first test channel, and the result of the comparison is an indication as to whether the selected node is coupled to ground.
摘要翻译： 一种用于测试电路板上节点互连的方法。 该方法利用具有至少一个测试通道的自动测试系统，其中每个测试通道具有带有第一输入和第一输出的数字驱动器，以及具有第二输出和第二输入的数字接收器。 接收器的第二输入端耦合到驱动器的第一输出端和测试探头。 测试探针被配置为将驱动器和接收器耦合到电路板上的多个节点之一。 在节点互连测试期间，第一测试信道的驱动器将测试信号应用于多个节点中的选定节点。 在施加测试信号之后的预定时间量，第一测试通道的接收器读取所选节点的节点电压。 然后将节点电压与第一测试信道的接收机的预定阈值电压进行比较，并且比较结果是所选节点是否耦合到地的指示。
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公开(公告)号：US5469064A
公开(公告)日：1995-11-21
申请号：US122031
申请日：1993-09-15
申请人： Ronald K. Kerschner , John M. Heumann , John E. McDermid , Ed. O. Schlotzhauer , David T. Crook
发明人： Ronald K. Kerschner , John M. Heumann , John E. McDermid , Ed. O. Schlotzhauer , David T. Crook
IPC分类号： G01R1/06 , F02P17/00 , G01R1/067 , G01R1/07 , G01R31/02 , G01R31/26 , G01R31/28 , G01R31/302 , G01R31/312
CPC分类号： G01R1/07 , G01R31/2806 , G01R31/2886 , G01R31/312 , F02P2017/006 , G01R31/3025
摘要： The present invention is an improved printed circuit board test system in which test probes are positioned to electronically engage a selected device or printed circuit board section on a printed circuit board for testing the printed circuit board for manufacturing defects. The printed circuit board test system uses a bed-of-nails test fixture to ground and excite predetermined sites on a first side of the printed circuit board and a robot to mechanically position test probe(s) at selected test sites on a second side of the printed circuit board. A controller is used to control the movement of the robotic tester and the selection of spring probes in the bed-of-nails fixture to be exited, grounded or measured.
摘要翻译： 本发明是一种改进的印刷电路板测试系统，其中测试探针定位成电子地接合印刷电路板上的所选择的装置或印刷电路板部分，以测试用于制造缺陷的印刷电路板。 印刷电路板测试系统使用床钉测试夹具来研磨并激发印刷电路板的第一侧上的预定位置，并且机器人将测试探针机械地定位在位于第二侧的选定测试位置 印刷电路板。 控制器用于控制机器人测试仪的运动和选择要退出，接地或测量的指甲夹具中的弹簧探头。
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公开(公告)号：US06601019B1
公开(公告)日：2003-07-29
申请号：US09441682
申请日：1999-11-16
IPC分类号： G06F946
CPC分类号： G06F11/3664 , G06F11/3672
摘要： A system and method are provided for validating a number of objects in a software application such as a testing system. The system comprises a processor and a memory that are electrically coupled to a local interface that may comprise, for example, a data bus and associated control bus. Stored on the memory and executed by the processor is a software application that includes validation logic. Broadly stated, the validation logic includes logic to detect at least one actual problem in an object of the software application, and logic to display at least one problem indication corresponding to the at least one actual problem in a context of the object.
摘要翻译： 提供了一种用于验证诸如测试系统的软件应用中的多个对象的系统和方法。 该系统包括电耦合到本地接口的处理器和存储器，本地接口可以包括例如数据总线和相关联的控制总线。 存储在存储器中并由处理器执行的是包括验证逻辑的软件应用。 广泛地说，验证逻辑包括检测软件应用的对象中的至少一个实际问题的逻辑，以及在对象的上下文中显示对应于至少一个实际问题的至少一个问题指示的逻辑。
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6.发明授权System and method for detecting shorts, opens and connected pins on a printed circuit board using automatic test equipment 失效使用自动测试设备检测印刷电路板上的短路，开路和连接引脚的系统和方法
公开(公告)号：US6051979A
公开(公告)日：2000-04-18
申请号：US360443
申请日：1999-07-25
IPC分类号： G01R31/02 , G01R31/28 , G01R31/3183 , G01R31/319 , G01K31/02
CPC分类号： G01R31/318342 , G01R31/2812 , G01R31/31915 , G01R31/3191
摘要： A method for testing node interconnection on a circuit board. The method utilizes an automated test system having at least one test channel, wherein each test channel has a digital driver with a first input and a first output, and a digital receiver with a second output and a second input. The second input of the receiver is coupled to the first output of the driver and to a test probe. The test probe is configured to couple the driver and receiver to one of a plurality of nodes on a circuit board. During a node interconnection test, a first selected node is coupled to a first test channel, and it is determined whether the first selected node is connected to ground. If the first selected node is not connected to ground, a second selected node is connected to ground; a test signal is applied to the first selected node via the digital driver of the first test channel; and it is determined whether the first selected node is connected to the second selected node.
摘要翻译： 一种用于测试电路板上节点互连的方法。 该方法利用具有至少一个测试通道的自动测试系统，其中每个测试通道具有带有第一输入和第一输出的数字驱动器，以及具有第二输出和第二输入的数字接收器。 接收器的第二输入端耦合到驱动器的第一输出端和测试探头。 测试探针被配置为将驱动器和接收器耦合到电路板上的多个节点之一。 在节点互连测试期间，第一选定节点耦合到第一测试信道，并且确定第一选定节点是否连接到地。 如果第一个选定的节点没有连接到地，则第二个选定的节点连接到地面; 经由第一测试信道的数字驱动器将测试信号施加到第一选择节点; 并且确定第一选定节点是否连接到第二选定节点。
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公开(公告)号：US5274336A
公开(公告)日：1993-12-28
申请号：US820711
申请日：1992-01-14
IPC分类号： G01R1/06 , F02P17/00 , G01R1/067 , G01R1/07 , G01R31/26 , G01R31/28 , G01R31/302 , G01R31/312 , G01R27/26
CPC分类号： G01R31/2806 , G01R1/07 , G01R31/2886 , G01R31/312 , F02P2017/006 , G01R31/3025
摘要： The invention is a capacitively coupled probe which can be used for non-contact acquisition of both analog and digital signals. The probe includes a shielded probe tip, a probe body which is mechanically coupled to the probe tip, and an amplifier circuit disposed within the probe body. The amplifier circuit receives a capacitively sensed signal from the probe tip and produces an amplified signal in response thereto. The amplifier has a large bandwidth to accommodate high-frequency digital signals. Further, the amplifier has a very low input capacitance and a high input resistance to reduce signal attenuation and loading of the circuit being probed. The amplifier circuit is disposed in the probe body closely adjacent to the probe tip in order to reduce stray and distributed capacitances. A reconstruction circuit reconstructs digital signals from the amplified capacitively sensed signal.
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公开(公告)号：US06191570B1
公开(公告)日：2001-02-20
申请号：US09361368
申请日：1999-07-26
IPC分类号： G01R1512
CPC分类号： G01R31/318342 , G01R31/2812 , G01R31/3191 , G01R31/31915
摘要： A method for testing node isolation on a circuit board. The method utilizes an automated test system having a plurality of test channels, wherein each test channel has a digital driver with a first input and a first output, and a digital receiver with a second output and a second input. The second input of the receiver is coupled to the first output of the driver, to a number of switches, and to a test probe. The test probe is configured to couple the driver and receiver to one of a plurality of nodes on a circuit board. The number of switches are configured to selectively couple the first output and second input to ground. During a node isolation test, each node of a test node group is coupled to one of the test channels. But for a selected node of the test node group, each node of the test node group is coupled to ground via the number of switches of the test channels coupled to the nodes. Thereafter, a test signal is applied to the selected node via the digital driver of a first test channel which is coupled to the selected node. It is then determined if the digital receiver of the first test channel indicates that the selected node is coupled to ground, and whether the selected node is isolated from the remaining nodes of the test node group. If the selected node is not isolated from the remaining nodes of the test node group, the nodes of the test node group are released from ground, a test signal is once again applied to the selected node, and a determination is made as to whether the selected node is grounded to thereby determine if the selected node is directly connected to ground. Finally, if the selected node is not directly connected to ground, varying subsets of the remaining nodes are coupled to ground, a test signal is once again applied to the selected node, and a determination is made as to whether the selected node is grounded to thereby determine which nodes of the test node group the selected node is isolated from.
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