Identification of pin-open faults by measuring current or voltage change
resulting from temperature change
    2.
    发明授权
    Identification of pin-open faults by measuring current or voltage change resulting from temperature change 失效
    通过测量由温度变化引起的电流或电压变化来识别引脚开路故障

    公开(公告)号:US5489851A

    公开(公告)日:1996-02-06

    申请号:US349709

    申请日:1994-12-05

    IPC分类号: G01R31/02 G01R31/04 G01R31/00

    CPC分类号: G01R31/046

    摘要: A method and apparatus for determining whether semiconductor components are electrically connected to a printed circuit board. A voltage (or current) is connected to two traces leading to connections to a semiconductor component to be tested. The initial current (or voltage) is measured at an initial temperature. Then, the temperature of the semiconductor is changed. Current (or voltage) is measured again after the temperature change. A change in current (or voltage) indicates that the semiconductor component is electrically connected to the trace.

    摘要翻译: 一种用于确定半导体部件是否电连接到印刷电路板的方法和装置。 电压(或电流)连接到两条导线,以连接到要测试的半导体元件。 在初始温度下测量初始电流(或电压)。 然后,改变半导体的温度。 温度变化后再次测量电流(或电压)。 电流(或电压)的变化表示半导体元件与迹线电连接。

    Capacitively-coupled amplifier with improved low frequency response
    3.
    发明授权
    Capacitively-coupled amplifier with improved low frequency response 失效
    具有改善的低频响应的电容耦合放大器

    公开(公告)号:US5392001A

    公开(公告)日:1995-02-21

    申请号:US202329

    申请日:1994-02-28

    摘要: A capacitively-coupled amplifier circuit includes an amplifier for receiving an input signal via a coupling capacitance and for amplifying the input signal to produce an output signal. A resistor provides a bias voltage to the amplifier. The resistor is bootstrapped using positive feedback with a loop gain of slightly less than one. The bootstrapping causes an increase in the value of the resistor to lower the cut-in (pole) frequency of the amplifier. The bootstrapping or feedback circuit includes a roll-off (pole) at a frequency below the roll-off (pole) frequency of the amplifier. This prevents phase shift in the feedback loop from adversely effecting the high frequency response of the amplifier. The resulting amplifier circuit exhibits a wide passband and excellent low frequency response despite having a capacitively coupled input signal.

    摘要翻译: 电容耦合放大器电路包括用于经由耦合电容接收输入信号并用于放大输入信号以产生输出信号的放大器。 电阻器为放大器提供偏置电压。 电阻器使用正反馈自举,循环增益略小于1。 自举引起电阻值的增加,以降低放大器的截止(极)频率。 自举或反馈电路包括频率低于放大器的滚降(极)频率的滚降(极)。 这样可以防止反馈回路中的相移不利地影响放大器的高频响应。 尽管具有电容耦合的输入信号,但是所得到的放大器电路具有宽的通带和优异的低频响应。

    In-circuit transistor beta test and method
    4.
    发明授权
    In-circuit transistor beta test and method 失效
    在线晶体管beta测试和方法

    公开(公告)号:US4801878A

    公开(公告)日:1989-01-31

    申请号:US064157

    申请日:1987-06-18

    IPC分类号: G01R31/26 H01L21/66 G01R31/22

    CPC分类号: G01R31/2614

    摘要: An in-circuit test device and method for testing transistors which are connected to various components on a printed circuit board. The present invention uses a fully automated system which provides a constant emitter current to bias the transistor to a predetermined level and prevents the transistor from going into saturation due to variations in the gain of different transistors. The collector lead and base lead are maintained at approximately ground potential so that the collector emitter voltage drop is maintained above the saturation voltage for transistors since the base emitter junction is biased by a constant emitter current placed in the emitter lead. Transistor gain is determined from the difference in two separate d.c. emitter currents which eliminates the effects of parallel impedence paths resulting from other components connected to the transistor on the printed circuit board. An operational amplifier having a feedback resistance is used so that the output voltage is directly proportional to the current flowing through the base of the transistor.

    System for discharging electronic circuitry

    公开(公告)号:US07132876B2

    公开(公告)日:2006-11-07

    申请号:US11023893

    申请日:2004-12-28

    IPC分类号: H03K17/74

    CPC分类号: G01R31/31924 G01R31/31932

    摘要: An electronic discharge circuit. The discharge circuit includes a first current source having first current source input and output and a current control circuit having first, second, third, and fourth control contacts. An electronic circuit element of an electronic circuit has first and second element contacts. If first control contact and first current source input are electrically connected, second control contact and first current source output are electrically connected, third control contact and first element contact are electrically connected, and fourth control contact and second element contact are electrically connected, and if the electronic circuit element is electronically charged, current discharging the electronic circuit element is limited to the current from the first current source, otherwise when so connected, current discharging the electronic circuit element is zero and current from the first current source flows into the second control contact and out the first control contact.

    Capacitive sensor measurement method for discrete time sampled system for in-circuit test

    公开(公告)号:US07132834B2

    公开(公告)日:2006-11-07

    申请号:US11287913

    申请日:2005-11-28

    IPC分类号: G01R31/08 G01R31/02

    CPC分类号: G01R31/312

    摘要: Disclosed is a novel method and apparatus for acquiring multiple capacitively sensed measurements from a circuit under test. Multiple digital sources are respectively connected to stimulate multiple respective first ends of multiple respective nets of interest. Respective second ends of the multiple respective nets of interest are capacitively sensed. The respective capacitively coupled signals are digitally sampled and shift correlated with respective expected digital signatures. If a high level of correlation is found for a given net, the net is electrically intact; otherwise, the net is characterized by either an open or some other fault that prevents it from meeting specification.

    Method and apparatus for discharging voltages from a circuit under test
    7.
    发明授权
    Method and apparatus for discharging voltages from a circuit under test 失效
    用于从被测电路放电的方法和装置

    公开(公告)号:US07411383B2

    公开(公告)日:2008-08-12

    申请号:US11233710

    申请日:2005-09-23

    IPC分类号: G01R31/00

    CPC分类号: G01R31/31924 G01R31/31932

    摘要: In one embodiment, voltages are discharged from a circuit under test by, after pins of a circuit tester have been coupled to nodes of the circuit under test, making a first one of the pins an active pin and executing a current discharge process for the active pin. The current discharge process couples a current discharge circuit to the active pin, and then enables the current discharge circuit. A voltage of the active pin is then measured and, if the measured voltage is within a defined window, the active pin is coupled to ground. However, if the measured voltage is outside of the defined window after the current discharge circuit has been enabled for a predetermined period of time, the active pin is marked as not discharged. The current discharged circuit is then disabled and decoupled from the active pin. Thereafter, a next one of the pins is made the active pin, and the current discharged process is caused to be repeated.

    摘要翻译: 在一个实施例中,电压从被测电路放电,在电路测试器的引脚连接到被测电路的节点之后,使第一个引脚成为有效引脚,并执行当前的放电过程 销。 电流放电过程将电流放电电路耦合到有源引脚,然后使能放电电路。 然后测量有源引脚的电压,如果测量的电压在定义的窗口内,则有源引脚耦合到地。 然而,如果在当前放电电路已经使能了预定时间段之后测量的电压在定义的窗口之外,则有源引脚被标记为不放电。 电流放电电路然后被禁止并且从有效引脚去耦。 此后,将下一个引脚作为有源引脚,并且使电流放电过程重复。

    Printed circuit board test access point structures and method for making the same
    8.
    发明授权
    Printed circuit board test access point structures and method for making the same 有权
    印刷电路板测试接入点结构及其制作方法

    公开(公告)号:US07307222B2

    公开(公告)日:2007-12-11

    申请号:US10670649

    申请日:2003-09-24

    IPC分类号: H01R12/04 H05K1/11 G01R31/02

    摘要: A test access point structure for accessing test points of a printed circuit board and method of fabrication thereof is presented. In an x-, y-, z-coordinate system where traces are printed along an x-y plane, the z-dimension is used to implement test access point structures. Each test access point structure is conductively connected to a trace at a test access point directly on top of the trace and along the z axis of the x-, y-, z-coordinate system above an exposed surface of the printed circuit board to be accessible for electrical probing by an external device.

    摘要翻译: 介绍了一种用于访问印刷电路板测试点的测试接入点结构及其制造方法。 在沿x-y平面打印痕迹的x,y,z坐标系中,z维用于实现测试接入点结构。 每个测试接入点结构在测试接入点处直接连接到轨迹顶部的迹线上,并且沿x,y,z坐标系的z轴在印刷电路板的暴露表面上导电连接为 可通过外部设备进行电气探测。

    Capacitive sensor measurement method for discrete time sampled system for in-circuit test
    9.
    发明授权
    Capacitive sensor measurement method for discrete time sampled system for in-circuit test 失效
    用于在线测试的离散时间采样系统的电容式传感器测量方法

    公开(公告)号:US07061250B2

    公开(公告)日:2006-06-13

    申请号:US11287768

    申请日:2005-11-28

    IPC分类号: G01R31/28 G01R27/26

    CPC分类号: G01R31/312

    摘要: Disclosed is a novel method and apparatus for acquiring multiple capacitively sensed measurements from a circuit under test. Multiple digital sources are respectively connected to stimulate multiple respective first ends of multiple respective nets of interest. Respective second ends of the multiple respective nets of interest are capacitively sensed. The respective capacitively coupled signals are digitally sampled and shift correlated with respective expected digital signatures. If a high level of correlation is found for a given net, the net is electrically intact; otherwise, the net is characterized by either an open or some other fault that prevents it from meeting specification.

    摘要翻译: 公开了一种用于从被测电路获取多个电容感测测量的新颖方法和装置。 多个数字源分别连接以刺激多个相关感兴趣的网络的多个相应的第一端。 感兴趣的多个相应的网络的相应的第二端被电容性地感测。 相应的电容耦合信号被数字采样并与相应的预期数字签名相关。 如果给定网络发现高水平的相关性,网络是电气完整的; 否则,网络的特征在于打开或其他一些故障,阻止其满足规范。

    Testing series passive components without contacting the driven node
    10.
    发明授权
    Testing series passive components without contacting the driven node 失效
    测试系列无源元件,不接触驱动节点

    公开(公告)号:US5760596A

    公开(公告)日:1998-06-02

    申请号:US810202

    申请日:1997-03-03

    IPC分类号: G01R31/02 G01R27/08

    CPC分类号: G01R31/02

    摘要: A method of testing series passive components in electronic assemblies. Only one test pin per passive component is required, thereby reducing the cost and complexity of test fixtures and the electronic assemblies. A passive component is connected between the output of a driving circuit and (optionally) an input of a receiving circuit. The output of the driving circuit is placed in a low impedance state. The receiving end of the passive component is stimulated and the response is measured. For reactive components, the stimulus and response are AC. For resistors, multiple DC measurements may be made. A optional DC bias may be provided to limit DC current and to further reduce the small signal output impedance of the driving circuit.

    摘要翻译: 一种在电子组件中测试串联无源元件的方法。 每个被动元件只需要一个测试针,从而降低测试夹具和电子组件的成本和复杂性。 无源元件连接在驱动电路的输出端和(可选地)接收电路的输入端之间。 驱动电路的输出处于低阻态。 对被动元件的接收端进行刺激并测量响应。 对于反应性组分,刺激和反应是AC。 对于电阻器,可以进行多个直流测量。 可以提供可选的直流偏压来限制直流电流并进一步降低驱动电路的小信号输出阻抗。