Device for testing an analog-to-digital converter
    1.
    发明申请
    Device for testing an analog-to-digital converter 失效
    用于测试模数转换器的装置

    公开(公告)号:US20070111670A1

    公开(公告)日:2007-05-17

    申请号:US11588857

    申请日:2006-10-27

    Applicant: Eric Compagne

    Inventor: Eric Compagne

    CPC classification number: H03M3/378 H03M3/458

    Abstract: A device for testing an analog-to-digital converter providing a digital signal at a given sampling frequency, comprising a unit for providing a test signal to the converter, the test signal being a periodic signal comprising frequency components only at a fundamental frequency and at harmonics of the fundamental frequency, the fundamental frequency being a multiple of one quarter of the sampling frequency; a filter capable of receiving the digital signal and of rejecting the fundamental frequency to provide a filtered digital signal; and a unit capable of receiving the digital signal and the filtered digital signal and of providing a signal representative of the ratio between the effective powers of the digital signal and of the filtered digital signal.

    Abstract translation: 一种用于测试以给定采样频率提供数字信号的模数转换器的装置,包括用于向转换器提供测试信号的单元,测试信号是包括仅在基频和 基频的谐波,基频是采样频率四分之一的倍数; 滤波器,其能够接收所述数字信号并拒绝所述基频以提供经滤波的数字信号; 以及能够接收数字信号和经滤波的数字信号并且提供表示数字信号的有效功率与滤波数字信号之间的比率的信号的单元。

    Digital signal transmitting circuit for telephone network
    2.
    发明授权
    Digital signal transmitting circuit for telephone network 失效
    电话网数字信号发送电路

    公开(公告)号:US4805214A

    公开(公告)日:1989-02-14

    申请号:US120428

    申请日:1987-11-13

    Abstract: A circuit is disclosed for the transmission of digital signals on a bifilary line, especially a telephone line. The circuit disclosed is a so-called S interface circuit which has to produce digital signals within certain set limits. The proposed circuit uses four differential amplifiers, each controlling an output transistor (N-channel MOS transistors and P-channel MOS transistors). The amplifiers receive feedback to maintain the overvoltages within acceptable limits. The invention applies especially to the setting up of integrated service digital telephone networks.

    Abstract translation: 公开了一种用于在双线,特别是电话线上传输数字信号的电路。 所公开的电路是所谓的S接口电路,其必须在一定的设定极限内产生数字信号。 所提出的电路使用四个差分放大器,每个差分放大器控制输出晶体管(N沟道MOS晶体管和P沟道MOS晶体管)。 放大器接收反馈以将过电压保持在可接受的限度内。 本发明尤其适用于综合业务数字电话网的建立。

    Self-protected dividing bridge
    3.
    发明授权
    Self-protected dividing bridge 失效
    自保护分隔桥

    公开(公告)号:US5315149A

    公开(公告)日:1994-05-24

    申请号:US35765

    申请日:1993-03-24

    Applicant: Eric Compagne

    Inventor: Eric Compagne

    CPC classification number: H01L27/0251 H01L27/0248

    Abstract: A self-protected divider bridge in an integrated circuit comprising a P.sup.- substrate, a N.sup.- well, a P region forming a resistor, diffused in said well. A first and a second outmost contact and an intermediate contact are formed on the diffused region. A pad connected to the first contact receives an external voltage higher than the supply voltage of the integrated circuit. The reference potential of the integrated circuit is connected to the second contact and the substrate. A third contact formed on the well close to the first contact is connected to the first contact, and a fourth contact formed on the well close to the second contact is connected to the second contact.

    Abstract translation: 集成电路中的自保护分压器桥,包括在所述阱中扩散的P-衬底,N阱,形成电阻器的P区。 在扩散区域上形成第一和第二最外面的触点和中间触点。 连接到第一触点的焊盘接收高于集成电路的电源电压的外部电压。 集成电路的参考电位连接到第二触点和基板。 在靠近第一触点的阱上形成的第三触点连接到第一触点,并且在靠近第二触点的阱上形成的第四触点连接到第二触点。

    Device for testing an analog-to-digital converter
    4.
    发明授权
    Device for testing an analog-to-digital converter 失效
    用于测试模数转换器的装置

    公开(公告)号:US07443322B2

    公开(公告)日:2008-10-28

    申请号:US11588857

    申请日:2006-10-27

    Applicant: Eric Compagne

    Inventor: Eric Compagne

    CPC classification number: H03M3/378 H03M3/458

    Abstract: A device for testing an analog-to-digital converter providing a digital signal at a given sampling frequency, comprising a unit for providing a test signal to the converter, the test signal being a periodic signal comprising frequency components only at a fundamental frequency and at harmonics of the fundamental frequency, the fundamental frequency being a multiple of one quarter of the sampling frequency; a filter capable of receiving the digital signal and of rejecting the fundamental frequency to provide a filtered digital signal; and a unit capable of receiving the digital signal and the filtered digital signal and of providing a signal representative of the ratio between the effective powers of the digital signal and of the filtered digital signal.

    Abstract translation: 一种用于测试以给定采样频率提供数字信号的模数转换器的装置,包括用于向转换器提供测试信号的单元,测试信号是包括仅在基频和 基频的谐波,基频是采样频率四分之一的倍数; 滤波器,其能够接收所述数字信号并拒绝所述基频以提供经滤波的数字信号; 以及能够接收数字信号和经滤波的数字信号并且提供表示数字信号的有效功率与滤波数字信号之间的比率的信号的单元。

    Memory reading device
    5.
    发明授权
    Memory reading device 失效
    记忆体读取装置

    公开(公告)号:US06724673B2

    公开(公告)日:2004-04-20

    申请号:US10018078

    申请日:2002-03-15

    CPC classification number: G11C7/14 G11C16/28

    Abstract: The invention concerns a device for reading a storage cell (4), comprising a reading differential amplifier (18) having a first input terminal (16) connected to a column of cells (10) and a circuit (34) designed to feed to a second input terminal (20) of the amplifier (18) a reference voltage (Vref). The circuit (34) comprises means (38) for storing the voltage of said column and means (38, 40, 42) for applying as reference voltage (Vref) the stored voltage modified by a predetermined quantity.

    Abstract translation: 本发明涉及用于读取存储单元(4)的设备,包括读取差分放大器(18),其具有连接到单元格列(10)的第一输入端(16)和设计成馈送到单元 放大器(18)的第二输入端(20)是参考电压(Vref)。 电路(34)包括用于存储所述列的电压的装置(38)和用于作为参考电压(Vref)施加由预定量修改的存储电压的装置(38,40,42)。

    Low noise arrangement or an amplifier
    6.
    发明授权
    Low noise arrangement or an amplifier 失效
    低噪声布置或放大器

    公开(公告)号:US5982234A

    公开(公告)日:1999-11-09

    申请号:US944454

    申请日:1997-10-06

    Applicant: Eric Compagne

    Inventor: Eric Compagne

    Abstract: The invention relates to an arrangement comprising a main amplifier (1, 10) and means (5) for creating, at least during predetermined periods, a floating references voltage (V.sub.G) for applying at least one input signal (V') on at least one first input terminal (E-, E) of the main amplifier, said reference voltage (V.sub.G) being servo-controlled to the equivalent input noise (Vn) of the main amplifier.

    Abstract translation: 本发明涉及一种包括主放大器(1,10)和装置(5)的装置,用于至少在预定时段期间至少在至少在预定时段内产生用于至少施加至少一个输入信号(V')的浮动参考电压(VG) 主放大器的一个第一输入端(E,E),所述参考电压(VG)被伺服控制到主放大器的等效输入噪声(Vn)。

    MOS transistor with high threshold voltage
    7.
    发明授权
    MOS transistor with high threshold voltage 失效
    具有高阈值电压的MOS晶体管

    公开(公告)号:US5239195A

    公开(公告)日:1993-08-24

    申请号:US700702

    申请日:1991-05-15

    Applicant: Eric Compagne

    Inventor: Eric Compagne

    CPC classification number: H01L29/42364 H01L27/0251 H01L29/7836

    Abstract: Disclosed is a MOS transistor with high threshold voltage comprising, in a semiconductor substrate with a first type of conductivity, surface drain and source regions with the second type of conductivity having a high doping concentration, separated by a thick oxide zone in which there is formed, in the substrate, an overdoped region with the first type of conductivity. Each of the drain and source regions is inserted in a well with the second type of conductivity, having a low doping concentration, formed in the substrate.

    Abstract translation: 公开了一种具有高阈值电压的MOS晶体管,其在具有第一类导电性的半导体衬底中包括具有高掺杂浓度的第二类导电性的表面漏极和源极区,其中形成有厚的氧化物区 在衬底中,具有第一类导电性的过掺杂区域。 漏极和源极区域中的每一个被插入到具有在衬底中形成的具有低掺杂浓度的第二类型的导电性的阱中。

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