公开(公告)号：US20160219851A1

公开(公告)日：2016-08-04

申请号：US14613444

申请日：2015-02-04

Applicant: Eric Lane

Inventor： Eric Lane

IPC: A01K75/00 ,  A01K97/00 ,  A01K74/00

CPC classification number: A01K75/00 ,  A01K74/00 ,  A01K97/00

Abstract: A flexible flap is secured to the perimeter of a conventional cast net and is configured to be grasped by a human user's mouth and teeth. The device includes mating jaw portions configured to accept and be secured to a perimeter cord of a cast net.

Abstract translation: 柔性翼片固定到常规铸网的周边上，并且构造成由人类用户的嘴和牙齿抓住。 该装置包括被配置成接受和固定到铸网的周线的配合钳口部分。

公开(公告)号：US6043668A

公开(公告)日：2000-03-28

申请号：US991788

申请日：1997-12-12

Applicant: Eric Lane Carney

Inventor： Eric Lane Carney

IPC: G01R31/28 ,  G01R31/00

CPC classification number: G01R31/2886

Abstract: A planarity verification system for proper positioning of testing probes comprises a plurality of electrical leads configured for connection to testing probes, an indicator electrically coupled to each of the leads, and a power source. One of the power source terminals is electrically coupled to the leads through the indicators and the other terminal is electrically coupled to a metalized surface such as a wafer to bias the surface. Each electrical lead forms part of a completed current path between the power source terminals when a testing probe contacts a biased surface and directs current through an associated indicator to provide an indication.

Abstract translation: 用于测试探针的正确定位的平面度验证系统包括被配置为连接到测试探针的多个电引线，电耦合到每个引线的指示器和电源。 电源端子之一通过指示器电耦合到引线，另一个端子电耦合到诸如晶片的金属化表面以偏置表面。 当测试探针接触偏置表面并且引导电流通过相关联的指示器以提供指示时，每个电引线构成电源端子之间的完成的电流路径的一部分。

公开(公告)号：US4876214A

公开(公告)日：1989-10-24

申请号：US201491

申请日：1988-06-02

Applicant: Tadanori Yamaguchi ,  Evan Patton ,  Eric Lane ,  Simon Yu

Inventor： Tadanori Yamaguchi ,  Evan Patton ,  Eric Lane ,  Simon Yu

IPC: H01L21/3213 ,  H01L21/763

CPC classification number: H01L21/32137 ,  H01L21/763

Abstract: An isolation region is fabricated in a silicon substrate by first forming a silicon dioxide insulating layer on the substrate. A silicon nitride mask layer and an oxide layer are then deposited on the insulating layer. The oxide, mask and insulating layers and the substrate are etched to form a trench in the substrate. A channel stopper is implanted in substrate below the trench and the oxide layer is then stripped. Thereafter, the trench surface is oxidized to extend the insulating layer into the trench. Next, the trench is partially filled with polysilicon material, the surface of which is initially oxidized to extend the insulating layer over the trench. The mask layer is etched back to expose portions of the insulating layer adjacent the trench. The upper surface of the polysilicon material in the trench and portions of the substrate beneath exposed portions of the insulating layer are further oxidized to thicken the insulating layer over the trench.

Abstract translation: 通过首先在衬底上形成二氧化硅绝缘层，在硅衬底中制造隔离区。 然后在绝缘层上沉积氮化硅掩模层和氧化物层。 蚀刻氧化物，掩模和绝缘层以及衬底，以在衬底中形成沟槽。 通道阻挡件植入在沟槽下方的衬底中，然后剥离氧化物层。 此后，沟槽表面被氧化以将绝缘层延伸到沟槽中。 接下来，沟槽部分地填充有多晶硅材料，其表面最初被氧化以在沟槽上延伸绝缘层。 掩模层被回蚀以暴露与沟槽相邻的绝缘层的部分。 沟槽中的多晶硅材料的上表面和绝缘层暴露部分下方的衬底部分被进一步氧化，以使沟槽上的绝缘层变厚。