公开(公告)号：US20130252369A1

公开(公告)日：2013-09-26

申请号：US13530675

申请日：2012-06-22

申请人： Eric S. Lee ,  Michael I-Shan Sun ,  Francois Hebert

发明人： Eric S. Lee ,  Michael I-Shan Sun ,  Francois Hebert

IPC分类号： H01L31/0232

CPC分类号： H01L31/02327 ,  H01L21/0272 ,  H01L31/02162 ,  H01L31/101 ,  H01L31/103 ,  H01L31/18

摘要： Light sensors including dielectric optical coatings to shape their spectral responses, and methods for fabricating such light sensors in a manner that accelerates lift-off processes and increases process margins, are described herein. In certain embodiments, a short duration soft bake is performed. Alternatively, or additionally, temperature cycling is performed. Alternatively, or additionally, photolithography is performed using a photomask that includes one or more dummy corners, dummy islands and/or dummy rings. Each of the aforementioned embodiments form and/or increase a number of micro-cracks in the dielectric optical coating not covering the photodetector sensor region, thereby enabling an accelerated lift-off process and an increased process margin. Alternatively, or additionally, a portion of the photomask can include chamfered corners so that the dielectric optical coating includes chamfered corners, which improves the thermal reliability of the dielectric optical coating.

摘要翻译： 本文描述了包括用于塑造其光谱响应的介电光学涂层的光传感器以及以加速剥离过程并增加工艺裕度的方式制造这种光传感器的方法。 在某些实施例中，执行短持续时间的软烘烤。 或者或另外，进行温度循环。 或者或附加地，使用包括一个或多个虚拟角，虚拟岛和/或虚拟环的光掩模来执行光刻。 上述实施例中的每一个形成和/或增加了不覆盖光电检测器传感器区域的电介质光学涂层中的许多微裂纹，从而能够加速剥离过程和增加的工艺余量。 或者或另外，光掩模的一部分可以包括倒角，使得介电光学涂层包括倒角，这改善了介电光学涂层的热可靠性。

公开(公告)号：US20130249032A1

公开(公告)日：2013-09-26

申请号：US13530809

申请日：2012-06-22

申请人： Eric S. Lee ,  Michael I-Shan Sun ,  Francois Hebert

发明人： Eric S. Lee ,  Michael I-Shan Sun ,  Francois Hebert

IPC分类号： H01L31/18 ,  H01L31/0232

CPC分类号： H01L31/02327 ,  H01L21/0272 ,  H01L31/02162 ,  H01L31/101 ,  H01L31/103 ,  H01L31/18

摘要： Light sensors including dielectric optical coatings to shape their spectral responses, and methods for fabricating such light sensors in a manner that accelerates lift-off processes and increases process margins, are described herein. In certain embodiments, a short duration soft bake is performed. Alternatively, or additionally, temperature cycling is performed. Alternatively, or additionally, photolithography is performed using a photomask that includes one or more dummy corners, dummy islands and/or dummy rings. Each of the aforementioned embodiments form and/or increase a number of micro-cracks in the dielectric optical coating not covering the photodetector sensor region, thereby enabling an accelerated lift-off process and an increased process margin. Alternatively, or additionally, a portion of the photomask can include chamfered corners so that the dielectric optical coating includes chamfered corners, which improves the thermal reliability of the dielectric optical coating.

摘要翻译： 本文描述了包括用于塑造其光谱响应的介电光学涂层的光传感器以及以加速剥离过程并增加工艺裕度的方式制造这种光传感器的方法。 在某些实施例中，执行短持续时间的软烘烤。 或者或另外，进行温度循环。 或者或附加地，使用包括一个或多个虚拟角，虚拟岛和/或虚拟环的光掩模来执行光刻。 上述实施例中的每一个形成和/或增加了不覆盖光电检测器传感器区域的电介质光学涂层中的许多微裂纹，从而能够加速剥离过程和增加的工艺余量。 或者或另外，光掩模的一部分可以包括倒角，使得介电光学涂层包括倒角，这改善了介电光学涂层的热可靠性。

公开(公告)号：US06256755B1

公开(公告)日：2001-07-03

申请号：US09174789

申请日：1998-10-19

申请人： Terence B. Hook ,  Chung H. Lam ,  Eric S. Lee ,  James S. Nakos ,  Nivo Rovedo ,  Richard Q. Williams ,  Robert C. Wong

发明人： Terence B. Hook ,  Chung H. Lam ,  Eric S. Lee ,  James S. Nakos ,  Nivo Rovedo ,  Richard Q. Williams ,  Robert C. Wong

IPC分类号： G11C2900

CPC分类号： G11C16/349 ,  G11C16/04 ,  G11C16/3495 ,  G11C29/50 ,  G11C29/50004 ,  G11C29/50012

摘要： An apparatus and method for detecting a defective array of NVRAM cells. A counter is provided which times an erase time interval for the NVRAM cells during a regular erase function. The computed erase interval is compared with a maximum erase interval to determine at least a first characteristic which indicates the block of NVRAMs is at the end of its useful life. A second characteristic is determined by computing the slope in the erase time function versus the number of simulated erase functions. When the slope of the erase function exceeds a maximum slope, the NVRAM array is determined to be at the end of its useful life.

摘要翻译： 一种用于检测NVRAM单元的不良阵列的装置和方法。 在常规擦除功能期间提供计数器，其为NVRAM单元的擦除时间间隔。 计算的擦除间隔与最大擦除间隔进行比较，以确定至少第一特性，其指示NVRAM的块处于其使用寿命的结束。 通过计算擦除时间函数中的斜率与模拟擦除函数的数量来确定第二特性。 当擦除功能的斜率超过最大斜率时，NVRAM阵列被确定为其使用寿命结束。

公开(公告)号：US08836064B2

公开(公告)日：2014-09-16

申请号：US13530809

申请日：2012-06-22

申请人： Eric S. Lee ,  Michael I-Shan Sun ,  Francois Hebert

发明人： Eric S. Lee ,  Michael I-Shan Sun ,  Francois Hebert

IPC分类号： H01L31/0232

CPC分类号： H01L31/02327 ,  H01L21/0272 ,  H01L31/02162 ,  H01L31/101 ,  H01L31/103 ,  H01L31/18

摘要： Light sensors including dielectric optical coatings to shape their spectral responses, and methods for fabricating such light sensors in a manner that accelerates lift-off processes and increases process margins, are described herein. In certain embodiments, a short duration soft bake is performed. Alternatively, or additionally, temperature cycling is performed. Alternatively, or additionally, photolithography is performed using a photomask that includes one or more dummy corners, dummy islands and/or dummy rings. Each of the aforementioned embodiments form and/or increase a number of micro-cracks in the dielectric optical coating not covering the photodetector sensor region, thereby enabling an accelerated lift-off process and an increased process margin. Alternatively, or additionally, a portion of the photomask can include chamfered corners so that the dielectric optical coating includes chamfered corners, which improves the thermal reliability of the dielectric optical coating.

摘要翻译： 本文描述了包括用于塑造其光谱响应的介电光学涂层的光传感器以及以加速剥离过程并增加工艺裕度的方式制造这种光传感器的方法。 在某些实施例中，执行短持续时间的软烘烤。 或者或另外，进行温度循环。 或者或附加地，使用包括一个或多个虚拟角，虚拟岛和/或虚拟环的光掩模来执行光刻。 上述实施例中的每一个形成和/或增加了不覆盖光电检测器传感器区域的电介质光学涂层中的数量的微裂纹，由此实现加速的剥离过程和增加的工艺余量。 或者或另外，光掩模的一部分可以包括倒角，使得介电光学涂层包括倒角，这改善了介电光学涂层的热可靠性。

公开(公告)号：US06627543B1

公开(公告)日：2003-09-30

申请号：US09564304

申请日：2000-05-03

申请人： Wanqing Cao ,  Guo-Qiang Patrick Lo ,  Shih-Ked Lee ,  Robert B. Hixson ,  Eric S. Lee

发明人： Wanqing Cao ,  Guo-Qiang Patrick Lo ,  Shih-Ked Lee ,  Robert B. Hixson ,  Eric S. Lee

IPC分类号： H01L2144

CPC分类号： H01L21/28518 ,  H01L21/2855

摘要： Disclosed are methods and systems for forming salicide, in which a semiconductor substrate is provided with at least one exposed silicon surface. The semiconductor substrate is placed into a sputtering chamber. A silicide-forming metal layer, formed of a metal such as Co, Ni, is sputter-deposited over the exposed silicon surface. A process temperature is controlled below room temperature during the sputter deposition and preferably between approximately 0° C. to 10° C. The silicide-forming metal layer formed on the exposed silicon surface is first annealed to convert the silicide-forming metal layer into a salicide layer. Also, the system of the present invention is comprised of a sputter chamber including a mount for mounting a semiconductor substrate and a cooling mechanism coupled with the mount for cooling the semiconductor substrate. The cooling mechanism includes a controller to maintain a process temperature below room temperature. Improved device characteristics such as increased charge-to-breakdown can be achieved in the devices according to the present invention compared to the devices with high-temperature sputtered salicide.

摘要翻译： 公开了用于形成硅化物的方法和系统，其中半导体衬底设置有至少一个暴露的硅表面。 将半导体衬底放置在溅射室中。 由诸如Co，Ni的金属形成的硅化物形成金属层溅射沉积在暴露的硅表面上。 在溅射沉积期间将工艺温度控制在室温以下，优选在约0℃至10℃之间。形成在暴露的硅表面上的硅化物形成金属层首先退火，以将硅化物形成金属层转变为 自杀层 而且，本发明的系统包括一个包括一个用于安装一个半导体衬底的安装座和一个冷却机构的溅射室，该冷却机构与用于冷却半导体衬底的安装座相连。 冷却机构包括将工艺温度保持在室温以下的控制器。 与具有高温溅射的自对准硅化物的装置相比，在根据本发明的装置中可以实现改进的装置特性，例如增加的电荷到击穿电压。

公开(公告)号：US20140001588A1

公开(公告)日：2014-01-02

申请号：US13535925

申请日：2012-06-28

申请人： Michael I-Shan Sun ,  Francois Hebert ,  Kenneth C. Dyer ,  Eric S. Lee

发明人： Michael I-Shan Sun ,  Francois Hebert ,  Kenneth C. Dyer ,  Eric S. Lee

IPC分类号： H01L27/14 ,  H01L31/18

CPC分类号： H01L27/14621

摘要： Monolithic optical sensor devices, and methods for fabricating such devices, are described herein. In an embodiment, a semiconductor wafer substrate includes a plurality of photodetector (PD) regions. A wafer-level inorganic dielectric optical filter is deposited and thereby formed over at least a subset of the plurality of PD regions. One or more wafer-level organic color filter(s) is/are deposited and thereby formed on one or more selected portion(s) of the wafer-level inorganic dielectric optical filter that is/are over selected ones of the PD regions. For example, an organic red filter, an organic green filter and an organic blue filter can be over, respectively, portions of the wafer-level inorganic dielectric optical filter that are over first, second and third PD regions.

摘要翻译： 本文描述了单片光学传感器装置及其制造方法。 在一个实施例中，半导体晶片衬底包括多个光电检测器（PD）区域。 沉积晶片级无机介质光学滤波器，从而形成在多个PD区域的至少一个子集上。 沉积一个或多个晶片级有机彩色滤光片，从而在晶片级无机介质光学滤波器的一个或多个选定的部分上形成PD选择的一部分。 例如，有机红色滤色器，有机绿色滤色器和有机蓝色滤色器可以分别结束在第一，第二和第三PD区域之上的晶片级无机介质滤光器的部分。